Emulation platform synthesis and NoC evaluation for embedded systems : towards next generation networks

Emulation platform synthesis and NoC evaluation for embedded systems : towards next generation networks

La complexité croissante des systèmes embarqués multi-coeur exige des structures de communication flexibles et capables de supporter de nombreuses requêtes de trafics au moment de l’exécution. Les Réseaux sur Puce (NoC) émergent comme la technologie de communication la plus prometteuse pour les SoCs...

Full description

Bibliographic Details
Main Author:	Alcantara de Lima, Otavio Junior
Other Authors:	Saint-Etienne
Language:	en
Published:	2015
Subjects:	NoC FPGA Plateformes d'émulation Protocole basé sur SNMP Exploration de l'espace de conception Évaluation de NoC Analyse de traces d'applications Réseaux sur puce du futur Emulation platforms SNMP-like protocol Design space exploration NoC evaluation Trace application analysis Next generation NoC
Online Access:	http://www.theses.fr/2015STET4001/document

Similar Items

SPAcENoCs : A Scalable Platform for FPGA Accelerated Emulator of NoCs
by: Chen, Guangming
Published: (2013)

Modélisation et gestion du trafic dans le cadre de réseaux sur puce multi-FPGA
by: Dorai, Atef
Published: (2017)

PERFORMANCE EVALUATION OF A MULTI-CLOCK NoC ON FPGA
by: SWAMINATHAN, VIJAY
Published: (2007)

NoC<sup>2</sup>: An Efficient Interfacing Approach for Heavily-Communicating NoC-Based Systems
by: Ahmed A. Morgan, et al.
Published: (2020-01-01)

COMPARISON OF SINGLE-PORT AND MULTI-PORT NoCs WITH CONTEMPORARY BUSES ON FPGAs
by: BHATTACHARYA, PRASUN
Published: (2006)

Low Power Design Methodology and Photonics Networks on Chip for Multiprocessor System on Chip
by: Hamwi, Khawla
Published: (2013)

Reconfigurable NoC development with fault mitigation
by: Elena Suvorova, et al.
Published: (2016-04-01)

Estratégia para redução de congestionamento em sistemas multiprocessadores baseados em NOC
by: KAMEI, Camila Ascendina Nunes
Published: (2016)

Adaptive NoC for reconﬁgurable SoC
by: Pratomo, Istas
Published: (2013)

Déploiement d'applications parallèles sur une architecture distribuée matériellement reconfigurable
by: Gamom Ngounou Ewo, Roland Christian
Published: (2015)

Networks-on-chip: modeling, system-level abstraction, and application-specific architecture customization.
by: Morgan, Ahmed Abdel Fattah Hassan
Published: (2011)

The network calculator for NoC buffer space evaluation
by: Nadezhda Matveeva, et al.
Published: (2015-04-01)

Run-time scalable NoC for virtualized FPGA based accelerators as cloud services
by: Kidane, Hiliwi Leake
Published: (2018)

Méthodologies de conception ASIC pour des systèmes sur puce 3D hétérogènes à base de réseaux sur puce 3D
by: Jabbar, Mohamad
Published: (2013)

HIGH LEVEL SYNTHSIS FOR A NETWORK ON CHIP TOPOLOGY
by: Ali, Baraa Saeed
Published: (2013)

Micronetwork based system-on-FPGA (SOFPGA) architecture
by: Al-Araje, Abdul-Nasser
Published: (2005)

Hybrid Nanophotonic NOC Design for GPGPU
by: Yuan, Wen
Published: (2012)

Designing Low Power and High Performance Network-on-Chip Communication Architectures for Nanometer SoCs
by: Reehal, Gursharan Kaur
Published: (2012)

Internal stakeholders perspectives in a cultural event: The Case of Noc Noc, Guimarães - Portugal
by: Marisa R. Ferreira, et al.
Published: (2015-03-01)

Conception de systèmes programmables basés sur les NoC par synthèse de haut niveau : analyse symbolique et contrôle distribué
by: Payet, Matthieu
Published: (2016)

Framework for Design Exploration and Performance Analysis of RF-NoC Manycore Architecture
by: Habiba Lahdhiri, et al.
Published: (2020-11-01)

Algoritmo de prefetching de dados temporizado para sistemas multiprocessadores baseados em NOC
by: SILVEIRA, Maria Cireno Ribeiro
Published: (2016)

Adaptive mpsoc architectures : principLes, methods and tools
by: Marchesan Almeida, Gabriel
Published: (2011)

A Scalable Software Defined Network Orchestrator for Photonic Network on Chips
by: Doaa A. Hamdi, et al.
Published: (2021-01-01)

Conception d'un réseau sur puce optimisé en latence
by: Chatmen, Mohamed Fehmi
Published: (2016)

Méthodologie de modélisation et d'exploration d'architecture de réseaux sur puce appliquée aux télécommunications
by: Delorme, Julien
Published: (2007)

Networks-on-chip: modeling, analysis, and design methodologies.
by: El Miligi, Haytham
Published: (2011)

Design, Implementation and Evaluation of a Configurable NoC for AcENoCs FPGA Accelerated Emulation Platform
by: Lotlikar, Swapnil Subhash
Published: (2011)

Customized High Performance and Energy Efficient Communication Networks for AI Chips
by: Wei Gao, et al.
Published: (2019-01-01)

Exploration architecturale et étude des performances des réseaux sur puce 3D partiellement connectés verticalement
by: Bahmani, Maryam
Published: (2013)

Modélisation système d'une architecture d'interconnexion RF reconfigurable pour les many-cœurs
by: Brière, Alexandre
Published: (2017)

Architectural Techniques for Improving the Power Consumption of NoC-Based CMPs: A Case Study of Cache and Network Layer
by: Emmanuel Ofori-Attah, et al.
Published: (2017-05-01)

STT-MRAM Based NoC Buffer Design
by: Vikram Kulkarni, Nikhil
Published: (2012)

Area-efficient programmable arbiter for inter-layer communications in 3-D network-on-chip
by: Khan Mohammad, et al.
Published: (2012-03-01)

Energy-Efficient and High-Performance Nanophotonic Interconnects for Shared Memory Multicores
by: Morris, Randy W., Jr.
Published: (2012)

Genetic algorithm for task mapping in embedded systems on a hierarchical architecture based on wireless network on chip WiNoC
by: Maribell Sacanamboy Franco, et al.
Published: (2017-06-01)

Estimativa de desempenho de uma NoC a partir de seu modelo em SYSTEMC-TLM.
by: Martha Johanna Sepúlveda Flórez
Published: (2006)

Estimativa de desempenho de uma NoC a partir de seu modelo em SYSTEMC-TLM.
by: Sepúlveda Flórez, Martha Johanna
Published: (2006)

Tolerating Permanent Faults in the Input Port of the Network on Chip Router
by: Hala J. Mohammed, et al.
Published: (2019-02-01)

A verilog-hdl implementation of virtual channels in a network-on-chip router
by: Park, Sungho
Published: (2010)