Evaluation in built-in self-test
This dissertation addresses two major issues associated with a built-in self-test environment: (1) how to measure whether a given test vector generator is suitable for testing faults with sequential behavior, and (2) how to measure the safety of self-checking circuits. Measuring the two-vector tr...
Main Author: | |
---|---|
Other Authors: | |
Format: | Others |
Language: | English en |
Published: |
2017
|
Subjects: | |
Online Access: | https://dspace.library.uvic.ca//handle/1828/8440 |
id |
ndltd-uvic.ca-oai-dspace.library.uvic.ca-1828-8440 |
---|---|
record_format |
oai_dc |
spelling |
ndltd-uvic.ca-oai-dspace.library.uvic.ca-1828-84402017-08-22T17:09:30Z Evaluation in built-in self-test Zhang, Shujian Miller, D. M. Muzio, Jon C. Generators (Computer programs) Sequential processing (Computer science) This dissertation addresses two major issues associated with a built-in self-test environment: (1) how to measure whether a given test vector generator is suitable for testing faults with sequential behavior, and (2) how to measure the safety of self-checking circuits. Measuring the two-vector transition capability for a given test vector generator is a key to the selection of the generators for stimulating sequential faults. The dissertation studies general properties for the transitions and presents a novel, comprehensive analysis for the linear feedback shift registers and the linear hybrid cellular automata. As a result, the analysis solves the open problem as to “how to properly separate the inputs when the LHCA-based generator is used for detecting delay faults”. In general, a self-checking circuit has additional hardware redundancy than the original circuit and as a result, the self-checking circuit may have a higher failure rate than the original one. The dissertation proposes a fail-safe evaluation to predict the probability of the circuit not being in the fail-state. Compared with existing evaluation methods, the fail-safe evaluation is more practical because it estimates the safety of the circuit, which is decreasing as time goes on, instead of giving a constant probability measure. Various other results about improving fault coverage for transition delay faults and testing in macro-based combinational circuits are derived as well. Graduate 2017-08-21T21:12:30Z 2017-08-21T21:12:30Z 1998 2017-08-21 Thesis https://dspace.library.uvic.ca//handle/1828/8440 English en Available to the World Wide Web application/pdf |
collection |
NDLTD |
language |
English en |
format |
Others
|
sources |
NDLTD |
topic |
Generators (Computer programs) Sequential processing (Computer science) |
spellingShingle |
Generators (Computer programs) Sequential processing (Computer science) Zhang, Shujian Evaluation in built-in self-test |
description |
This dissertation addresses two major issues associated with a built-in self-test environment: (1) how to measure whether a given test vector generator is suitable for testing faults with sequential behavior, and (2) how to measure the safety of self-checking circuits.
Measuring the two-vector transition capability for a given test vector generator is a key to the selection of the generators for stimulating sequential faults. The dissertation studies general properties for the transitions and presents a novel, comprehensive analysis for the linear feedback shift registers and the linear hybrid cellular automata. As a result, the analysis solves the open problem as to “how to properly separate the inputs when the LHCA-based generator is used for detecting delay faults”.
In general, a self-checking circuit has additional hardware redundancy than the original circuit and as a result, the self-checking circuit may have a higher failure rate than the original one. The dissertation proposes a fail-safe evaluation to predict the probability of the circuit not being in the fail-state. Compared with existing evaluation methods, the fail-safe evaluation is more practical because it estimates the safety of the circuit, which is decreasing as time goes on, instead of giving a constant probability measure.
Various other results about improving fault coverage for transition delay faults and testing in macro-based combinational circuits are derived as well. === Graduate |
author2 |
Miller, D. M. |
author_facet |
Miller, D. M. Zhang, Shujian |
author |
Zhang, Shujian |
author_sort |
Zhang, Shujian |
title |
Evaluation in built-in self-test |
title_short |
Evaluation in built-in self-test |
title_full |
Evaluation in built-in self-test |
title_fullStr |
Evaluation in built-in self-test |
title_full_unstemmed |
Evaluation in built-in self-test |
title_sort |
evaluation in built-in self-test |
publishDate |
2017 |
url |
https://dspace.library.uvic.ca//handle/1828/8440 |
work_keys_str_mv |
AT zhangshujian evaluationinbuiltinselftest |
_version_ |
1718518390453174272 |