Design and analysis of a boosted pierce oscillator using MEMS SAW resonators
This paper highlights the design and analysis of a pierce oscillator circuit for CMOS MEMS surface acoustic wave resonators. The boosted pierce topology using two, three-stage cascode amplifiers provides sufficient gain to counteract the high insertion losses of − 65 dB at 1.3 GHz of the SAW resonat...
Main Authors: | , , , |
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Format: | Article |
Language: | English |
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Springer Verlag
2018
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Subjects: | |
Online Access: | View Fulltext in Publisher View in Scopus |
LEADER | 02495nam a2200445Ia 4500 | ||
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001 | 10.1007-s00542-017-3627-y | ||
008 | 220120s2018 CNT 000 0 und d | ||
020 | |a 09467076 (ISSN) | ||
245 | 1 | 0 | |a Design and analysis of a boosted pierce oscillator using MEMS SAW resonators |
260 | 0 | |b Springer Verlag |c 2018 | |
490 | 1 | |t Microsystem Technologies | |
650 | 0 | 4 | |a Accurate prediction |
650 | 0 | 4 | |a Acoustic resonators |
650 | 0 | 4 | |a Acoustic surface wave devices |
650 | 0 | 4 | |a Acoustic waves |
650 | 0 | 4 | |a Amplifiers (electronic) |
650 | 0 | 4 | |a Cadence Design Systems |
650 | 0 | 4 | |a Cascode amplifiers |
650 | 0 | 4 | |a Circuit simulation |
650 | 0 | 4 | |a CMOS integrated circuits |
650 | 0 | 4 | |a Conventional methods |
650 | 0 | 4 | |a Design and analysis |
650 | 0 | 4 | |a Equivalent circuits |
650 | 0 | 4 | |a Integrated circuit design |
650 | 0 | 4 | |a Integrated circuit manufacture |
650 | 0 | 4 | |a Low-power consumption |
650 | 0 | 4 | |a MEMS SAW resonators |
650 | 0 | 4 | |a Oscillators (electronic) |
650 | 0 | 4 | |a Phase noise |
650 | 0 | 4 | |a Pierce oscillator |
650 | 0 | 4 | |a Resonators |
650 | 0 | 4 | |a Surface acoustic wave resonators |
856 | |z View Fulltext in Publisher |u https://doi.org/10.1007/s00542-017-3627-y | ||
856 | |z View in Scopus |u https://www.scopus.com/inward/record.uri?eid=2-s2.0-85034844141&doi=10.1007%2fs00542-017-3627-y&partnerID=40&md5=063d1eef54151236b5146c6f876be5f1 | ||
520 | 3 | |a This paper highlights the design and analysis of a pierce oscillator circuit for CMOS MEMS surface acoustic wave resonators. The boosted pierce topology using two, three-stage cascode amplifiers provides sufficient gain to counteract the high insertion losses of − 65 dB at 1.3 GHz of the SAW resonator. For accurate prediction of the oscillator’s performance before fabrication, circuit design utilized touchstone S2P measurement results of the MEMS SAW resonator, which provides better results compared to the conventional method of using equivalent circuit simulations. This circuit was designed using Silterra’s 0.13 μm CMOS process. It has low power consumption of 1.52 mW with high voltage swing 0.10–0.99 V. All simulations were conducted using Cadence Design Systems and results indicate that phase noise of 92.63 dBc at 1 MHz. © 2017, Springer-Verlag GmbH Germany, part of Springer Nature. | |
700 | 1 | 0 | |a Hamzah, M.H. |e author |
700 | 1 | 0 | |a Karim, J. |e author |
700 | 1 | 0 | |a Nordin, A.N. |e author |
700 | 1 | 0 | |a Ralib, A.A.M. |e author |
773 | |t Microsystem Technologies |