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01808nam a2200349Ia 4500 |
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10.1088-1748-0221-17-04-C04004 |
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|a 17480221 (ISSN)
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|a QEMU-based hardware/software co-development for DAQ systems
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|b IOP Publishing Ltd
|c 2022
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|z View Fulltext in Publisher
|u https://doi.org/10.1088/1748-0221/17/04/C04004
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|a Modern DAQ systems typically use the FPGA-based PCIe cards to concentrate and deliver the data to a computer used as an entry node of the data processing network. This paper presents a QEMU-based methodology for the co-development of the FPGA-based hardware part, the Linux kernel driver, and the data receiving application. This approach enables quick verification of the FPGA firmware architecture, organization of control registers, the functionality of the driver, and the user-space application. The developed design may be tested in different emulated architectures with a changeable CPU, IOMMU, size of memory, and the number of DAQ cards. © 2022 IOP Publishing Ltd and Sissa Medialab.
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|a Computer operating systems
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|a DAQ system
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|a Data acquisition
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|a Data acquisition circuit
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|a Data acquisition circuits
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|a Data acquisition concept
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|a Data acquisition concepts
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|a Data handling
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|a Data receiving
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|a Field programmable gate arrays (FPGA)
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|a Firmware
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|a FPGA firmware
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|a Hardware-software co-development
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|a Kernel drivers
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|a Linux kernel
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|a Network architecture
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|a Processing Network
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|a Timing circuits
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|a Zabołotny, W.M.
|e author
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|t Journal of Instrumentation
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