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01630nam a2200205Ia 4500 |
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10.5455-jjcit.71-1644147942 |
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220630s2022 CNT 000 0 und d |
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|a 24139351 (ISSN)
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|a FULLY OPTIMIZED ULTRA WIDEBAND RF RECEIVER FRONT END
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|b Scientific Research Support Fund of Jordan
|c 2022
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|a This paper proposes a novel and fully optimized ultra-wideband RF receiver front end in UMC 180nm 1P6M CMOS process. The heterodyne architecture used in this work does not use the on-chip image reject mixer. The proposed receiver consists of a cascode inductively degenerated common source differential low noise amplifier and a folded Gilbert down-conversion mixer. The differential low-noise amplifier eliminates the use of active balun and improves the noise performance, while the folded architecture reduces the power dissipation of the receiver. The post-layout simulated result shows that the receiver has a voltage gain of 15.2-19.8dB, a noise figure of 4.8-8.9dB, a third-order input intercept point (IIP3) of-6.3 to-2.9dBm and consumes 31.5mW from a 1.8V supply. The receiver has a good reverse isolation S12 of-42 to-59dB due to cascode configuration and occupies an area of 2.55mm2. © 2022, Scientific Research Support Fund of Jordan. All rights reserved.
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|a CMOS
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|a IIP3
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|a Noise figure
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|a Receiver front end
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|a UWB
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|a Khatri, R.
|e author
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|a Mishra, D.K.
|e author
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|t Jordanian Journal of Computers and Information Technology
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856 |
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|z View Fulltext in Publisher
|u https://doi.org/10.5455/jjcit.71-1644147942
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