Power balanced circuits for leakage-power-attacks resilient design

The continuous rise of static power consumption in modern CMOS technologies has led to the creation of a novel class of security attacks on cryptographic systems. The latter exploits the correlation between leakage current and the input patterns to infer the secret key; it is called leakage power an...

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Bibliographic Details
Main Authors: Halak, Basel (Author), Murphy, Julian (Author), Yakovlev, Alex (Author)
Format: Article
Language:English
Published: 2013.
Subjects:
Online Access:Get fulltext
LEADER 01369 am a22001453u 4500
001 348357
042 |a dc 
100 1 0 |a Halak, Basel  |e author 
700 1 0 |a Murphy, Julian  |e author 
700 1 0 |a Yakovlev, Alex  |e author 
245 0 0 |a Power balanced circuits for leakage-power-attacks resilient design 
260 |c 2013. 
856 |z Get fulltext  |u https://eprints.soton.ac.uk/348357/1/LPA%2520aser.pdf 
520 |a The continuous rise of static power consumption in modern CMOS technologies has led to the creation of a novel class of security attacks on cryptographic systems. The latter exploits the correlation between leakage current and the input patterns to infer the secret key; it is called leakage power analysis (LPA). The use power-balanced (m-of-n) logic is a promising solution that provides an answer to this problem, such circuits are designed to consume constant amount of power regardless of data being processed. This work evaluates the security of cryptographic circuits designed with this technology against the newly developed LPA. Two forms of LPA are investigated, one is based on differential power analysis (LDPA) and the other based on Hamming weight analysis (LHPA). Simulations performed at 90nm CMOS technology reveal that (m-of-n) circuits are totally resilient to LHPA and have a higher security level against LDPA than standard logic circuits. 
655 7 |a Article