Showing 1 - 20 results of 22 for search 'DIGITAL LOGIC DESIGN WITH HDL', query time: 1.35s Refine Results
  1. 1
    Digital Circuit Design of Premise Part of Fuzzy Logic Controllers with Variable Circuit Structure
    by Taso,Yo-Ting, 曹右廷
    Published 2012
    “... for the premise part of a dual-input single-output fuzzy logic controller. The control circuit is designed...”
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  2. 2
    FPGA design and synthesis for digital down converter of WCDMA
    by Kuo-Jung Huang, 黃國榮
    Published 2007
    “...; therefore, we can logic synthesis and then complete digital IF down converter design. ...”
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  3. 3
    The Design of Unmanned Aviation Vehicle for Digital Servo-Driver Controller
    by Chih-Jung Lu, 盧志榮
    Published 2004
    “... by digital logic chips and a control circuit driven by a brushless DC motor was manufactured to substitute...”
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  4. 4
    An Implementation of Space Time Block Codes by Verilog HDL
    by Yat-Tai Shiao, 蕭義泰
    Published 2005
    “... become a standard hardware description language, Popularly use in VLSI and Digital System Design...”
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  5. 5
    A Circuit Generator for Logic Reduction of Boolean Functions and Its Application to the Design of Advanced Encryption Standard
    by Chi-Cheng Lin, 林啟政
    Published 2005
    “.... Then the simplified code is fed into Synopsys Design Compiler for further logic minimization and technology mapping...”
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  6. 6
    Developments of Digital IPs for Direct Torque Control Platform
    by Hung-Yen Su, 蘇鴻彥
    Published 2007
    “... direct Torque Control (DTC) for Induction Motors. Describe with Verilog HDL that writes every mould group...”
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  7. 7
    Two Ring Time-to-Digital Converter for Gas Electron Multiplier Detector
    by 顏文偉
    Published 2014
    “... signals and the energy signals are fed to the time-to-digital converter (TDC) units and Amplitude-to-Time...”
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  8. 8
    An All-Digital Fast-Locking Deskew Buffer using Standard Cell Library
    by Fujii,Yasuyoshi, 藤井泰嘉
    Published 2016
    “... designed in a full-custom design manner. However, this work is completely implemented with the logic gates...”
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  9. 9
    Design of PID fuzzy controller IC using FPGA
    by 楊溢棋
    Published 2002
    “... HDL (Hardware Description Language) and Altera FPGA (Field Programmable Gate Array) to design...”
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  10. 10
    The design of MIPS Central Process Unit(Using VHDL)
    by George Chou, 周一志
    Published 2006
    “...: Arithmetic and Logic Unit；ALU Register Control Unit；CU Memory Use hierarchical design concept and when every...”
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  11. 11
    Design and Implementation of PIC16LF84 MCU Chip
    by Cheng, Wei-Jui, 鄭暐叡
    Published 2018
    “... based on Microchip PIC16LF84 specifications from the mid-range PIC series, and completes the digital...”
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  12. 12
    The IC design of Cascade Integrator Comb Filters for Sigma-Delta Converter application.
    by Bor-Tang Chang, 張伯廷
    Published 2016
    “..., and finally applying Design Compiler Tools to perform logic synthesis using TSMC 0.18μm 1P6M Process Cell...”
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  13. 13
    The Design and Implementation of an Improved Twofish Encryption/Decryption Chip Using FPGA Devices
    by Guo Jhih Sun, 孫國智
    Published 2006
    “... Verilog HDL (Hardware Design Language) simulation with ModelSim, and compiled with FPGA Compile II...”
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  14. 14
    Design and Implementation of Four Pipeline Architecture for PIC16F676MCU
    by Lu, Shih-Bin, 盧世彬
    Published 2018
    “... by the National Chip Implementation Center (CIC), thereby completing the digital integrated circuit design process...”
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  15. 15
    The VLSI Design of One-dimensional， Multi-level Discrete Wavelet Transform with Adaptive Decomposition
    by yanglin-Chen, 陳央霖
    Published 2009
    “... digital CMOS chip. In the near future, ASICs will use up to 15 million logic gates, and only a small...”
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  16. 16
    The Design and Implementation of a high speed Radix-4 Carry free Division Architecture
    by Min-Shiou Tsai, 蔡旻修
    Published 2000
    “...-radix and signed digit number techniques are thus proposed. However, the quotient selection logic...”
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  17. 17
    New Architecture for High Throughput-Rate Real-Time 2-D DCT and the VLSI Design
    by Huang, Hsiang-Chou, 黃祥洲
    Published 1996
    “... is designed for real-time digital video data and the processing data rate is more than 50 MHz...”
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  18. 18
    Design and Implementation of a Standard-Time Server and Tracking Scheme for a Network Time System
    by Ching-Chiang Lin, 林清江
    Published 2004
    “..., we used hardware describe languages (HDL) and a complex programmable logic device (CPLD) to develop...”
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  19. 19
    Design and Implementation of a FPGA Anti-Handshaking Position Control Chip for a Voice Coil Motor
    by Yi-Chao Lu, 呂宜釗
    Published 2008
    “... chips are integrated on a single FPGA chip. In digital logic chips, HDL (Hardware Description Language...”
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  20. 20
    New Moduli Set {2^(2n), 2^(n)+1, 2^(n)-1} of Residue Number System and VLSI Design of Infinite Impulse Response Filter
    by Siang-Min Siao, 蕭翔民
    Published 2011
    “...-bits.After the HDL simulations and logic synthesis by TSMC 0.18μm process in DR 32-bits, the chip area...”
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