-
1“... characterized through high-frequency C-V analysis and external temperature-voltage stress. The nonuniform...”
Get full text
Others -
2“... the same gate capacitance, high k materials are expected to replace the conventional silicon oxide...”
Get full text
Others -
3“...博士 === 國立臺灣大學 === 電機工程學研究所 === 95 === The effects of ESD high-field current impulse on gate oxide...”
Get full text
Others -
4“... led to the fabrication of high-performance MOSFET with ultra-thin gate oxides (~3nm) and thus...”
Get full text
Others -
5“... in semiconductor industry, the high-k gate dielectrics continuously play significant roles to achieve small...”
Get full text
Others -
6“... diode under high positive voltage stress is discussed. After high positive voltage stress, the I-V curve...”
Get full text
Others -
7“... current of planar device decreases after low voltage stress and then increases after high voltage stress...”
Get full text
Others -
8“... in capacitance per unit area-voltage and current density-voltage characteristics, and the percentage dispersions...”
Get full text
Others -
9“... to replace the aluminum contact. It was expected to take the advantage of ITO with high-transmission of light...”
Get full text
Others -
10“... to replace conventional high-temperature thermal gate oxide is enhanced as the MOSFET dimension shrinks...”
Get full text
Others -
11“... is high. It will not affect the current when the electrode distances are ranging from 60μm to 10μm...”
Get full text
Others -
12“..., the power supply voltage is also decreased to reduce power consumption. The voltage levels of power supplies...”
Get full text
Others -
13“...碩士 === 國立臺灣大學 === 電子工程學研究所 === 100 === In this work, the electrical properties of high-k gate...”
Get full text
Others -
14“... tunneling current phenomenon in Al2O3/SiO2/4H-SiC stacked device. In the high-k/SiO2 stacked dielectric MOS...”
Get full text
Others -
15“... to form high-dielectric sidewall passivation layer on the edge of gate electrode was demonstrated...”
Get full text
Others -
16“... band voltage and interface trap density can be extracted from the C-V plot. According to high frequency...”
Get full text
Others -
17“...碩士 === 國立臺灣大學 === 電子工程學研究所 === 92 === To obtain high performance and low power device, gate oxide...”
Get full text
Others -
18“...-uniformity on device reliability. The TCAD simulations show highly inhomogeneous oxide field in the corner...”
Get full text
Others -
19“... properties including tunneling current under gate injection, flatband voltage, interface state density...”
Get full text
Others -
20“.... Besides, 25% reduction in interface trap density (Dit) can also be observed after SF-ANO treatment. High...”
Get full text
Others
