Showing 1 - 20 results of 21 for search 'DYNAMICS', query time: 1.14s Refine Results
  1. 1
    High Dynamic Range Image Synthesis and Its SOC Exploration for Dynamic Objects
    by Cheng-YenHo, 何承嚴
    Published 2014
    “... quality of images and videos increasingly, High Dynamic Range Image has apparently become an indispensable...”
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  2. 2
    Temporal Partitioning Algorithms for Dynamically Reconfigurable FPGA
    by Min-Zhe Liu, 劉明哲
    Published 2003
    “...碩士 === 國立成功大學 === 電機工程學系碩博士班 === 91 === Dynamically Reconfigurable FPGAs (DR-FPGAs) are evolving...”
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  3. 3
    Design of High Dynamic Range CMOS Image Sensor
    by Chun-Chieh Wang, 王俊杰
    Published 2004
    “.... Typical CMOS image sensors do not have sufficient Dynamic Range (DR) (around 60 dB) to capture the full...”
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  4. 4
    High Dynamic Range CMOS Digital Pixel Sensor
    by Chia-Nan Yeh, 葉佳楠
    Published 2003
    “... offer many applications if they are capable of high speed imaging. Dynamic range is the ratio...”
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  5. 5
    Wide dynamic range CMOS image sensor with multiple sampling
    by Jui-YU Chang, 張瑞譽
    Published 2007
    “... of the logarithmic output response was suitable to human eye’s sensitivity. Dynamic range is the ratio of the largest...”
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  6. 6
    High Dynamic Range Image Synthesis with Image Registration and Deghosting
    by Bo-JieTsai, 蔡伯杰
    Published 2016
    “... more realistic visu-al experiences. High dynamic range imaging, which can capture the approximate...”
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  7. 7
    Gabor Binary Pattern based Dynamic Sparse Representation for Face Recognition
    by Jheng-YingYang, 楊政穎
    Published 2016
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  8. 8
    Improved Predictive Sampling Algorithmfor Linear Wide Dynamic Range CMOS Image Sensor
    by Ming-Hsien Wu, 吳明憲
    Published 2005
    “...碩士 === 國立成功大學 === 電機工程學系碩博士班 === 93 === 　Sensor dynamic range is an important figure of merit...”
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  9. 9
    Design of Logarithmic Response CMOS Image Sensor Using Pixel-Level ADC
    by Ming-Hui Cheng, 鄭明輝
    Published 2006
    “...碩士 === 國立成功大學 === 電機工程學系碩博士班 === 94 === The dynamic range of CMOS image sensor is generally limited...”
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  10. 10
    High Performance CMOS Image Sensor System
    by Chia-NanYeh, 葉佳楠
    Published 2010
    “... are proposed to reduce both dynamic and static power consumption of shift-register-based readout control...”
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  11. 11
    HDR aligment with matching SURF feature points
    by Zhen-YuWeng, 翁振育
    Published 2017
    “...碩士 === 國立成功大學 === 電機工程學系 === 105 === High dynamic range, HDR, means the range of the maximum...”
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  12. 12
    Performance Optimization for Reconfigurable Computing
    by Tzu-ChiangTai, 戴自強
    Published 2010
    “... programmable gate arrays (FPGAs) is one of the most widely used. Particularly, dynamically reconfigurable FPGAs...”
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  13. 13
    High Fill Factor Logarithmic Digital Pixel Sensor
    by Tien-Chien Lee, 李天健
    Published 2009
    “... of the logarithmic output response was suitable to human eye’s sensitivity. Dynamic range is the ratio of the largest...”
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  14. 14
    Design of 2048-point Real-Time FFT of OFDM by Using Reconfigurable FPGA
    by Chi-Yao Hsu, 許績耀
    Published 2004
    “... opens new implementation alternatives and creates new design challenges. In the case of dynamically...”
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  15. 15
    High Linear BiCMOS Track-and-Hold Amplifier
    by Hung-YiLin, 林宏益
    Published 2012
    “... spurious free dynamic range (SFDR) of 55.52 dB and a signal-to-noise distortion ratio (SNDR) of 54.27 dB...”
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  16. 16
    New Time-Multiplexed FPGA Architecture for Sequential Circuits
    by Chung-Wei Liu, 劉忠瑋
    Published 2006
    “...碩士 === 國立成功大學 === 電機工程學系碩博士班 === 94 === Dynamically Reconfigurable FPGAs (DRFPGAs) are evolving...”
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  17. 17
    Circuit Partition Algorithm for New Time-Multiplexed FPGA
    by Tsung-Yi Lee, 李宗昱
    Published 2007
    “...碩士 === 國立成功大學 === 電機工程學系碩博士班 === 95 === Dynamically Reconfigurable FPGAs (DRFPGAs) are evolving...”
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  18. 18
    Schedule Algorithm for New Time-Multiplexed FPGA
    by Kai-Chen Yang, 楊凱程
    Published 2008
    “...碩士 === 國立成功大學 === 電機工程學系碩博士班 === 96 === Dynamically Reconfigurable FPGAs (DRFPGAs) are evolving...”
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  19. 19
    Automatic Synthesis and Optimization of Interface Circuits
    by Ting-Hau Hsiao, 蕭挺豪
    Published 2005
    “... such that the wiring area and dynamic power consumption can be minimized in resulting interface circuit. 2.) Phase II...”
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  20. 20
    An Improved Time-Multiplexed FPGA and Its Circuit Partitioning Algorithm
    by Chung-Kai Liu, 劉仲凱
    Published 2005
    “...碩士 === 國立成功大學 === 電機工程學系碩博士班 === 93 === 　　Dynamically Reconfigurable FPGAs (DRFPGAs) are evolving...”
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