Showing 1 - 3 results of 3 for search 'ELECTRONICS DESIGN', query time: 0.56s Refine Results
  1. 1
    Design of the distributed Cache for reconfigurable array processor
    by Jiang Lin, Liu Yang, Shan Rui, Liu Peng, Geng Yurong
    Published 2018-12-01
    “...” in reconfigurable array processors is increasing. Traditionally, the use of multi-level shared Cache hardware design...”
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    Article
  2. 2
    Design of texture cache for embedded mobile graphics processing unit
    by Han Mengqiao, Jiang Lin, Yang Bowen, Shan Rui, Geng Yurong
    Published 2019-05-01
    “... parallel reading are designed. FIFO buffer is designed for prefetching memory data and reducing memory...”
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    Article
  3. 3
    Design and implementation of high speed serial interface controller circuit for 3 GS/s 12 bit ADCs
    “... on JESD204B protocol, this paper designs a high speed serial interface control layer circuit applied to 3...”
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    Article
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