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1“... transitions between microstrip line and substrate integrated waveguide (SIW), and a vertical transition...”
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2“... integrated waveguide (SIW) bandpass filter’s structures in a multilayer low-temperature co-fired ceramic...”
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3“... signal and power integrity, and also active circuit models, the ground noise issue can be discussed...”
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4“..., with the trends of the slim, low-power, and high bandwidth features. The three-dimensional integration...”
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5“... of electronic packaging, the electrical modeling and designs for signal integrity (SI) of vertical interconnects...”
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6“...) transmission line design in the lower redistribution layer in InFO-WLP (Integrated Fan-Out Wafer-Level...”
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7“... composed of single and double-folded SIW resonators. All of them are designed and fabricated in a...”
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8“... computer printed circuit board, such as the via and pad. As the transmission data rate exceeds several Gbit...”
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9“... is introduced to analyze the signal integrity in a Double Data Rate (DDR3) high-speed memory module...”
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10“... design whose tuning range is from 5GHz to 2.5GHz on InFO-WLP (Integrated Fan-Out Wafer-Level-Packaging...”
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11“... digital circuit is simulated to demonstrate the signal integrity effect of the single bend. Because...”
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12“... spurious problem and predictable response – with multilayer PCB process, circuit layouts can be integrated...”
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13“...-speed digital circuits and systems-in-package design, we analyzed the TSV equivalent circuit model...”
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14“... lumped circuits. The second part designs a tri-band branch-line coupler with conventional transmission...”
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15“... printed circuit boards. The transitions are all designed with flip-chip structures. The first design...”
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16“... is an open-circuited type V-band transition between microstrip line and substrate integrated waveguide (SIW...”
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17“... filters, the design of 2-in-1 bandpass flter reduces half of cavities and achieves circuit area...”
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18“... from serious signal and power integrity issues due to lower re-distribution layer (RDL). Because...”
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19“.... The signal integrity analyses for bent differential transmission lines in a high-speed digital circuit...”
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20“... for connecting an integrated circuit chip and an antenna array on the opposite sides of a multi-layer low...”
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