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Asynchronous design; Digital circuits; Single-bit full adder; Dual-bit full adder; Ripple carry adder; Indication; Early output; Standard cells; CMOS
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Asynchronous design; Digital circuits; Single-bit full adder; Dual-bit full adder; Ripple carry adder; Indication; Early output; Standard cells; CMOS
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Asynchronous design; Digital circuits; Single-bit full adder; Dual-bit full adder; Ripple carry adder; Indication; Early output; Standard cells; CMOS
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Latency Optimized Asynchronous Early Output Ripple Carry Adder Based on Delay-insensitive Dual-rail Data Encoding
by
Balasubramanian, P
,
Prasad, K
Published 2019
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