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  1. 1
    MULTI-STREAM DATA-DRIVEN TELEMETRY SYSTEM
    by Can, Ouyan, Chang-jie, Shi
    Published 1991
    Subjects: “...Multi-Processor Architecture...”
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  2. 2
    Generating RTL for microprocessors from architectural and microarchitectural description
    by Bansal, Ankit Sajjan Kumar
    Published 2011
    Subjects: “...Processor architecture...”
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    Others
  3. 3
    ALGORITHM OF RATIONAL PROCESSOR ARCHITECTURE
    by N. A. Zykov, N. A. Shamenkov, A. A. Karytko
    Published 2015-01-01
    Subjects: “...processor architecture...”
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    Article
  4. 4
    "a+b" arithmetic - Theory and implementation
    by Manickavasagam, Senthilkumar
    Published 1996
    Subjects: “...SPARC (Scalable Processor ARChitecture)...”
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  5. 5
    On the distribution of control in asynchronous processor architectures
    by Rebello, Vinod
    Published 1997
    Subjects: “...Asynchronous Processor Architectures...”
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  6. 6
    Design of an Adaptable Run-Time Reconfigurable Software-Defined Radio Processing Architecture
    by Templin, Joshua R.
    Published 2010
    Subjects: “...Processor Architecture...”
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    Others
  7. 7
    A RISC-V Processor Design for Transparent Tracing
    Subjects: “...processor architecture...”
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    Article
  8. 8
    Applications des technologies mémoires MRAM appliquées aux processeurs embarqués
    by Cargnini, Luís Vitório
    Published 2013
    Subjects: “...Processor Architecture...”
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  9. 9
    RISC-V3: A RISC-V Compatible CPU With a Data Path Based on Redundant Number Systems
    Subjects: “...processor architectures...”
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    Article
  10. 10
    FPGA-Based Processor Acceleration for Image Processing Applications
    Subjects: “...processor architectures...”
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    Article
  11. 11
    Cloud Computing for Digital Libraries
    by Poulo, Lebeko Bearnard
    Published 2013
    Subjects: “...C.1 PROCESSOR ARCHITECTURES...”
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  12. 12
    Improving processor utilization in multiple context processor architectures
    by Killeen, Timothy F.
    Published 1997
    Subjects: “...context processor architectures...”
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  13. 13
    Out-of-Order Retirement of Instructions in Superscalar, Multithreaded, and Multicore Processors
    by Ubal Tena, Rafael
    Published 2010
    Subjects: “...Processor architecture...”
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    Doctoral Thesis
  14. 14
    Améliorer la performance séquentielle à l’ère des processeurs massivement multicœurs
    by Prémillieu, Nathanaël
    Published 2013
    Subjects: “...Processor architecture...”
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  15. 15
    Clock Distribution in a 3d Microprocessor
    by Arunachalam, Venkatesh
    Published 2009
    Subjects: “...3D processor architectures...”
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  16. 16
    Reuso especulativo de traços com instruções de acesso à memória
    by Laurino, Luiz Sequeira
    Published 2008
    Subjects: “...Processor architectures...”
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    Others
  17. 17
    Reuso especulativo de traços com instruções de acesso à memória
    by Laurino, Luiz Sequeira
    Published 2008
    Subjects: “...Processor architectures...”
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    Others
  18. 18
    Reuso especulativo de traços com instruções de acesso à memória
    by Laurino, Luiz Sequeira
    Published 2008
    Subjects: “...Processor architectures...”
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    Others
  19. 19
    Exekveringsmiljö för Plex-C på JVM
    by Möller, Johan
    Published 2002
    Subjects: “...processor architecture...”
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    Others
  20. 20
    Increasing the performance of superscalar processors through value prediction
    by Perais, Arthur
    Published 2015
    Subjects: “...Processor architecture...”
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