Finite impulse response filter design on distributed arithmetic architecture

by Abu Zaharin, Muhamad Iqbal
Published 2012

Hardware implementation of coordinate rotation digital computer in field programmable gate array

by Mohd. Sazali, Mohd. Ilyas Sobirin
Published 2012

Bim and genetic algorithm optimisation for sustainable building envelope design

by Lim, Y. W., Majid, H. A., Samah, A. A., Ahmad, M. H., Ossen, D. R., Harun, M. F., Shahsavari, F.
Published 2018

Systolic array architecture and its application in finite impulse response filter design

by Kadir, Ezdiani Idayu
Published 2013

Elliptic-curve cryptographic architectures for system-on-chip based on field programmable gate arrays

by Irwansyah, Arif
Published 2009

A 10-bit 50 mega-samples-per-second pipelined analog-to-digital converter

by Yusoff, Yuzman
Published 2010

Interactive personal digital assistant based telemedicine system using wireless local area network

by Su, Shaw Bank
Published 2007

2-D DWT system architecture for image compression

by Ang, Boon Hui
Published 2012

Interactive spatial web-based system for eco-tourism in Royal Belum state park, Perak

by Mohd. Shah, Shazwani
Published 2019

A matrix inversion hardware architecture based on Gauss-Jordan elimination for MIMO applications

by Orabi, Hammam
Published 2014

Development of single board computer based on 32-bit 5-stage pipeline RISC processor

by Koay, Boon Wooi
Published 2009

A high speed 2D convolution hardware module for image processing applications in hardware

by Baba, Beenal
Published 2013

Design of an advanced encryption standard crypto-processor core for field programmable gate array implementation

by Ismail, Mohd. Izuan
Published 2006

FPGA implementation of Image processing 2D convolution for spatial filter

by Ng, Bee Yee
Published 2012

RTL implementation of one-sided jacobi algorithm for singular value decomposition

by Wan Mohamad, Wan Ahmad Zainie
Published 2016

Hardware acceleration of 2D convolution using systolic array

by Wong, Xue Yuan
Published 2015

Face detection hardware accelerator using C-based high-level synthesis

by Yeap, Han Chien
Published 2018

A hardware implementation of Rivest-Shamir-Adleman co-processor for resource constrained embedded systems

by Paniandi, Arul
Published 2006