“... sample/s, current-steering digital to analog converter (current-steering DAC) is proposed and analyzed. A...”
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“... together with digital circuits and don’t exhibit the jitter accumulation characteristic as PLL’s do...”
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“...) of National Science Council (NSC). The chip design, simulation, layout, verification...”
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“...博士 === 淡江大學 === 電機工程學系博士班 === 93 === Power dissipation is always a major design consideration...”
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“... be adopted to the design of high perfor- mance digital processing systems...”
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