Showing 1 - 20 results of 33 for search 'DIGITAL LOGIC DESIGN WITH HDL', query time: 0.74s Refine Results
  1. 1
    CMOS digital integrated circuit design faced to NBTI and other nanometric effects
    by Dal Bem, Vinícius
    Published 2012
    Subjects: “...Digital design...”
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  2. 2
    CMOS digital integrated circuit design faced to NBTI and other nanometric effects
    by Dal Bem, Vinícius
    Published 2012
    Subjects: “...Digital design...”
    Get full text
    Others
  3. 3
    CMOS digital integrated circuit design faced to NBTI and other nanometric effects
    by Dal Bem, Vinícius
    Published 2012
    Subjects: “...Digital design...”
    Get full text
    Others
  4. 4
    On-silicon testbench for validation of soft logic cell libraries
    by Bavaresco, Simone
    Published 2008
    Subjects: “...Digital design...”
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  5. 5
    On-silicon testbench for validation of soft logic cell libraries
    by Bavaresco, Simone
    Published 2008
    Subjects: “...Digital design...”
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    Others
  6. 6
    On-silicon testbench for validation of soft logic cell libraries
    by Bavaresco, Simone
    Published 2008
    Subjects: “...Digital design...”
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    Others
  7. 7
    SAT based environment for logical capacity evaluation of via configurable block templates
    by Dal Bem, Vinícius
    Published 2016
    Subjects: “...Digital IC design...”
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    Others
  8. 8
    SAT based environment for logical capacity evaluation of via configurable block templates
    by Dal Bem, Vinícius
    Published 2016
    Subjects: “...Digital IC design...”
    Get full text
    Others
  9. 9
    SAT based environment for logical capacity evaluation of via configurable block templates
    by Dal Bem, Vinícius
    Published 2016
    Subjects: “...Digital IC design...”
    Get full text
    Others
  10. 10
    Syhthesis of thereshold logic based circuits
    by Silva, Augusto Neutzling
    Published 2015
    Subjects: “...Digital circuits...”
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  11. 11
    Syhthesis of thereshold logic based circuits
    by Silva, Augusto Neutzling
    Published 2015
    Subjects: “...Digital circuits...”
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  12. 12
    Syhthesis of thereshold logic based circuits
    by Silva, Augusto Neutzling
    Published 2015
    Subjects: “...Digital circuits...”
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  13. 13
    Design and evaluation of logic gates based on IG FinFET
    “... as a circuit element used for the implementation of different combinational logic networks...”
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  14. 14
    Design and evaluation of logic gates based on IG FinFET
    “... as a circuit element used for the implementation of different combinational logic networks...”
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    Others
  15. 15
    Design and evaluation of logic gates based on IG FinFET
    “... as a circuit element used for the implementation of different combinational logic networks...”
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    Others
  16. 16
    Aging aware design techniques and CMOS gate degradation estimative
    by Butzen, Paulo Francisco
    Published 2012
    Subjects: “...Digital integrated circuit design...”
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  17. 17
    Aging aware design techniques and CMOS gate degradation estimative
    by Butzen, Paulo Francisco
    Published 2012
    Subjects: “...Digital integrated circuit design...”
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  18. 18
    Aging aware design techniques and CMOS gate degradation estimative
    by Butzen, Paulo Francisco
    Published 2012
    Subjects: “...Digital integrated circuit design...”
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  19. 19
    Evaluation of using MIGFET devices in digital integrated circuit design
    by Baqueta, Jeferson José
    Published 2017
    Subjects: “...Digital circuits...”
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  20. 20
    Evaluation of using MIGFET devices in digital integrated circuit design
    by Baqueta, Jeferson José
    Published 2017
    Subjects: “...Digital circuits...”
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    Others
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