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  1. 161
    INTELLIGENCE DRIVEN TEST SEQUENCE GENERATOR FOR VLSI (VECTOR, AUTOMATIC TESTING, SCAN DESIGN, FAULT SIMULATION, HEURISTIC SEARCH).
    by MOHSSENIBEHBAHANI, ALAA.
    Published 1984
    Subjects: “...Computer-aided design....”
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  2. 162
    Circuits for high-performance low-power VLSI logic
    by Ma, Albert
    Published 2007
    “... computing, as well as the challenges of nanometer-era VLSI design, require new digital logic techniques...”
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  3. 163
    Logical Representation of FPGAs and FPGA Circuits within the SCA
    by Carrick, Matthew
    Published 2014
    “...A very basic engineering tradeoff is performance versus flexibility and this design choice must...”
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  4. 164
    Power Analysis of Sub-threshold Logics for Security Applications
    by Haghighizadeh, Farhad
    Published 2012
    “... sub-threshold logic design. Major reductions in power consumption and frequency of operation...”
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  5. 165
    Power Analysis of Sub-threshold Logics for Security Applications
    by Haghighizadeh, Farhad
    Published 2012
    “... sub-threshold logic design. Major reductions in power consumption and frequency of operation...”
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  6. 166
    FARADAY CUP SYSTEM CONTROL LOGIC ON THE WIND SPACECRAFT
    “.... This paper presents the digital section designed and built in our laboratory which functions well to (a...”
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  7. 167
    An integrated low-cost functional tester for CMOS logic
    by Low, William
    Published 2009
    “... pattern rate. This strategy can be used to test many digital designs. However, using this strategy...”
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  8. 168
    An integrated low-cost functional tester for CMOS logic
    by Low, William
    Published 2009
    “... pattern rate. This strategy can be used to test many digital designs. However, using this strategy...”
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  9. 169
    Técnicas de reconfigurabilidade dos FPGAs da família APEX 20K - Altera.
    by Teixeira, Marco Antonio
    Published 2002
    Subjects: “...digital logic...”
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  10. 170
    Técnicas de reconfigurabilidade dos FPGAs da família APEX 20K - Altera.
    by Marco Antonio Teixeira
    Published 2002
    Subjects: “... digital logic ...”
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  11. 171
    Architectures and algorithms for synthesizable embedded programmable logic cores
    by Kafafi, Noha
    Published 2009
    “...) and the integrated circuit designer synthesizes the programmable logic fabric using standard cells. Although...”
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  12. 172
    MCML gate design methodology ante the tradeoffs between MCML and CMOS applications
    by Canal, Bruno
    Published 2016
    Subjects: “...MOS current-mode logic...”
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  13. 173
    MCML gate design methodology ante the tradeoffs between MCML and CMOS applications
    by Canal, Bruno
    Published 2016
    Subjects: “...MOS current-mode logic...”
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  14. 174
    MCML gate design methodology ante the tradeoffs between MCML and CMOS applications
    by Canal, Bruno
    Published 2016
    Subjects: “...MOS current-mode logic...”
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  15. 175
    A Computationally Efficient Pipelined Architecture for 1D/2D Lifting Based Forward and Inverse Discrete Wavelet Transform for CDF 5/3 Filter
    by CEKLI, S.
    Published 2018-05-01
    Subjects: “...digital systems...”
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    Article
  16. 176
    Combinational Logic Unit implementation for the AHPL simulator HPSIM2
    by Salas, Jorge Martin, 1961-
    Published 1989
    “...The use of Computer Hardware Description Languages plays an important role in the design automation...”
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  17. 177
    A PCM Telemetry System Using Programmable Logic Devices
    by Stewart, Michael T.
    Published 1988
    “..., Nevada === This paper discusses a PCM telemetry system consisting of programmable logic devices (PLDs...”
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  18. 178
    A data structure for interactive graphic manipulation of logic diagrams
    by Crom, Leslie Allen
    Published 2020
    Subjects: “...Logic diagrams...”
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  19. 179
    Cellular building components : investigation into parametric modeling and production logics
    “...). === Recent advances in digital fabrication technologies have sparked a renewed interest in topology...”
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  20. 180
    Magnetic logic circuits with high bit resolution for hardware acceleration
    “... beyond conventional digital transistor circuits. We explore a logic device based on magnetic domain walls...”
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