Showing 1 - 20 results of 343 for search 'LEVEL DESIGN', query time: 0.98s Refine Results
  1. 1
    Translation of Heterogeneous High-level Models to Lower Level Design Languages
    by Jackson, Brian Aliston
    Published 2014
    Subjects: “...Top-down/Bottom-up Design...”
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  2. 2
    Design Verification for Sequential Systems at Various Abstraction Levels
    by Zhang, Liang
    Published 2014
    “... daunting task to circuit designers. Functional verification alone often surpasses 70% of the total...”
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  3. 3
    Ingredients for Successful System Level Automation & Design Methodology
    by Patel, Hiren Dhanji
    Published 2014
    “...This dissertation addresses the problem of making system level design (SLD) methodology based...”
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  4. 4
    Power Line Communications in Microprocessors - System Level Study and Circuit Design
    by Chawla, Vipul
    Published 2014
    “.... The study provides useful insights for the design of microprocessor level PLC system. Specifically...”
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  5. 5
    Digital Filter Design and Synthesis Using High-level Modeling Tools
    by Jackson, Brian Aliston
    Published 2014
    “..., the user can then migrate to lower levels of abstraction until an actual real world model is designed. High...”
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  6. 6
    Facilitating FPGA Reconfiguration through Low-level Manipulation
    by Zha, Wenwei
    Published 2014
    Subjects: “...Bitstream-level Manipulation...”
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  7. 7
    High Level Power Estimation and Reduction Techniques for Power Aware Hardware Design
    by Ahuja, Sumit
    Published 2014
    Subjects: “...High Level Synthesis...”
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  8. 8
    Dataflow Analysis and Optimization of High Level Language Code for Hardware-Software Co-Design
    by O'Connor, R. Brendan
    Published 2014
    Subjects: “...co-design...”
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  9. 9
    Design, Fabrication and Testing of Conformal, Localized Wafer-level Packaging for RF MEMS Devices
    by Collins, Gustina B.
    Published 2014
    Subjects: “...wafer-level packaging...”
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  10. 10
    Digital CMOS Design for Ultra Wideband Communication Systems: from Circuit-Level Low Noise Amplifier Implementation to a System-Level Architecture
    by Lee, Hyung-Jin
    Published 2014
    “... challenges of CMOS RFIC design, there are two major technical challenges for the implementation of CMOS...”
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  11. 11
    Evaluating the Design and Performance of a Single-Chip Parallel Computer Using System-Level Models and Methodology
    by La Fratta, Patrick Anthony
    Published 2014
    Subjects: “...System-level Design...”
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  12. 12
    Configurable Architecture for System-Level Prototyping of High-Speed Embedded Wireless Communication Systems
    by Subramanian, Visvanathan
    Published 2014
    Subjects: “...Communication System Design...”
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  13. 13
    Evaluation Techniques for Mapping IPs on FPGAs
    by Lakshminarayana, Avinash
    Published 2014
    Subjects: “...High Level Synthesis...”
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  14. 14
    A Device-Level FPGA Simulator
    by Hunter, Jesse Everett III
    Published 2011
    “... the complexity of large FPGA designs. At times, a behaviorally-modeled design does not work in hardware...”
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  15. 15
    Gate-level Leakage Assessment and Mitigation
    by Kathuria, Tarun
    Published 2021
    “... demonstrated is a turnkey solution for IP module designers and is also applicable to larger system level...”
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  16. 16
    Passive Component Weight Reduction for Three Phase Power Converters
    by Zhang, Xuning
    Published 2014
    Subjects: “...Filter design and optimization...”
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  17. 17
    An Investigation of Methods to Improve Area and Performance of Hardware Implementations of a Lattice Based Cryptosystem
    by Beckwith, Luke Parkhurst
    Published 2020
    Subjects: “...Register Transfer Level Design...”
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  18. 18
    High-Level CSP Model Compiler for FPGAs
    by Asthana, Rohit Mohan
    Published 2014
    Subjects: “...High-Level Synthesis...”
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  19. 19
    Design Methods for Cryptanalysis
    by Judge, Lyndon Virginia
    Published 2014
    Subjects: “...Design method...”
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  20. 20
    Branch Guided Metrics for Functional and Gate-level Testing
    by Acharya, Vineeth Vadiraj
    Published 2015
    “... of the design activity has moved to the register transfer level (RTL), test methodologies at the RTL have been...”
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