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4“... was designed. Hardware of the system mainly includes self-developed parallel double spring cantilevers and its...”
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9“...Programmable Logic Controller(PLC) board-level tooling test system, designed to test the single...”
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10by ZHANG HuaSubjects: “...low level radioactive liquid waste...”
Published 2016-02-01
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11“...” in reconfigurable array processors is increasing. Traditionally, the use of multi-level shared Cache hardware design...”
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14by LIU Mingwei, ZHU Qing, ZHU Jun, FENG Bin, LI Yun, ZHANG Junxiao, FU Xiao, ZHANG Pengcheng, YANG Weijun, NING Xinwen, XU Wanyan“...The existing spatio-temporal data visualization methods are mainly targeted at low-level view-only...”
Published 2018-08-01
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17Published 2020-02-01“... based on VLIW is designed by optimizing the computation of each layer of deep convolutional neural...”
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19“... of reverse staggering are proved. An inverted interleaved circuit structure is designed, the timing alignment...”
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20“.... Compared with traversing method, dichotomy has higher convergence rate. Auto trim circuit was designed...”
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