Showing 1 - 12 results of 12 for search 'VLSI SYSTEM DESIGN', query time: 0.59s Refine Results
  1. 1
    Object Distance and Velocity Estimation Algorithm and VLSI Design for FMCW Radar System
    by Hsin-Jui Tsui, 崔興瑞
    Published 2006
    “...碩士 === 國立雲林科技大學 === 電子與資訊工程研究所 === 94 === Continuous-wave ( CW ) radar systems are more suitable...”
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  2. 2
    VLSI Architecture Design of Class-base Packet Scheduling
    by Shing-Jeh Jiang, 江欣潔
    Published 2000
    “... analysis and the VLSI architecture design of the packet scheduler. Currently, WFQ has excellent...”
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  3. 3
    Fast RNS-Based Arithmetic Architecture Design and Its VLSI Implementation
    by Su-Hon Lin, 林蘇宏
    Published 2002
    “... of the designed system. The residue number system (RNS) offers carry-free, high degree of parallelism...”
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  4. 4
    VLSI Design of Low-Error Multiplier and High-Performance Crossbar for DSP
    by Jhih-Jie Lin, 林智傑
    Published 2007
    “... the system performance. Besides, considering that the shared bus architecture can not supply the bandwidth...”
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  5. 5
    The fast frequency-detecting algorithm and low-cost VLSI design for the sinusoidal signal in noisy environment
    by Shih-Tsung Kan, 甘世宗
    Published 2001
    “... frequency. Besides, it is necessary to design a VLSI architecture for satisfying the requirements of modern...”
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  6. 6
    New Moduli Set {2^(2n), 2^(n)+1, 2^(n)-1} of Residue Number System and VLSI Design of Infinite Impulse Response Filter
    by Siang-Min Siao, 蕭翔民
    Published 2011
    “... - {22n, 2n +1, 2n-1} to constitute the residue number system (RNS) to deal with external input digital...”
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  7. 7
    High-Performance RNS-based System Design and Its Signal Processing Applications
    by Su-Hon Lin, 林蘇宏
    Published 2008
    “... operand. The key factor for designing a practical RNS-based system is the choice of the moduli set...”
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  8. 8
    Hardware/Software Co-design for Image Object Segmentation
    by Jen-Chieh Lee, 李仁傑
    Published 2007
    “...-design, we design an image processing software flow with our hardware system to implement a motion...”
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  9. 9
    DA Architecture Design for RNS-based DCT Accelerator
    by Chung-Chin Chiu, 邱俊欽
    Published 2010
    “... VLSI architecture which is designed base on residue number system(RNS). The <2n-1,2n-3,2n+1,2n+1...”
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  10. 10
    Design and application of low power pulse-triggered flip-flops
    by Yu-Ru Cho, 卓育儒
    Published 2009
    “...碩士 === 國立雲林科技大學 === 電子與資訊工程研究所 === 97 === Low power design of VLSI circuits has been identified...”
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  11. 11
    Block-Based Image Object Detection for Embedded System
    by Chuang-Chun Hu, 胡莊群
    Published 2010
    “... the system performance. This parallel labeling is suitable for VLSI architecture design. After the Verilog...”
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  12. 12
    The Chip Designs of Low Cost Sense Amplifier Based Flip-Flop and Low Voltage Static Random Access Memory
    by Hung,Yi-Ting, 洪顗婷
    Published 2018
    “... kinds of VLSI designs. In particular, VLSI designs nowadays often adopt intensive pipelining techniques...”
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