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  1. 141
    FORMAL: A SEQUENTIAL ATPG-BASED BOUNDED MODEL CHECKING SYSTEM FOR VLSI CIRCUITS
    by Qiang, Qiang
    Published 2006
    Subjects: “...VLSI Design and Verification...”
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  2. 142
    DESIGN AND ANALYSIS OF LOW POWER MULTIPLY AND ACCUMULATE UNIT USING PIXEL PROPERTIES REUSABILITY TECHNIQUE FOR IMAGE PROCESSING SYSTEMS
    by M. Madheswaran, S. Saravanan
    Published 2012-08-01
    Subjects: “...VLSI Design...”
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    Article
  3. 143
    VLSI Architecture and System Design of Fast Realistic Block-based Refocusing for Full-HD Sparse Light Fields
    by Yang, Shu-Wen, 楊舒雯
    Published 2018
    “..., and it results in high requirement of on-chip memory. The schedule of hierarchical pipeline is designed...”
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  4. 144
    Noise-Aware and Light-Weight VLSI Design of Bilateral Filter for Robust and Fast Image Denoising in Mobile Systems
    by Sung-Joon Jang, Youngbae Hwang
    Published 2020-08-01
    Subjects: “...very-large-scale integration (VLSI)...”
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    Article
  5. 145
    Low-Complexity Motion-Compensated Beamforming Engine and VLSI Design for Portable High Frame Rate Ultrasound System
    by Kuan-Yu Ho, 何寬育
    Published 2012
    “...碩士 === 國立臺灣大學 === 電子工程學研究所 === 100 === Ultrasonic imaging system provide diagnostic information...”
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  6. 146
    Algorithm Designs and VLSI Implementations of Novel Pre-Processing and Sorting Based K-Best Detections for MIMO Systems
    by Jheng-Jhan He, 何政展
    Published 2014
    “... the improvement of the internal sorting network. For the hardware design and VLSI Implementations, the proposed...”
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  7. 147
    Data-structure builder for VLSI/CAD software
    by Eum, Doo-hun
    Published 2013
    Subjects: “...Computer-aided design...”
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  8. 148
    VLSI physical design automation for double patterning and emerging lithography
    by Yuan, Kun, 1983-
    Published 2011
    Subjects: “...VLSI physical design automation...”
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  9. 149
    Architectures and Algorithms for Mitigation of Soft Errors in Nanoscale VLSI Circuits
    by Bhattacharya, Koustav
    Published 2009
    Subjects: “...Design flow...”
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  10. 150
    VLSI REALIZATION OF AHPL DESCRIPTIONS AS STORAGE LOGIC ARRAY.
    by CHIANG, CHEN HUEI.
    Published 1982
    Subjects: “...Integrated circuits -- Very large scale integration -- Design....”
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  11. 151
    New Residue Number System Scaler for the Three-Moduli Set {2n+1 − 1, 2n, 2n − 1}
    by Ahmad Hiasat
    Published 2018-09-01
    Subjects: “...VLSI design...”
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    Article
  12. 152
    The VLSI Architecture Design of Moving Objects Detection with Adaptive Filter
    by Tsung-Cheng Wu, 吳宗政
    Published 2010
    “... 1291 FPS (Frame per second).In the same way to design the VLSI architecture, the system can reach 48...”
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  13. 153
    VLSI Implementation of FPIC Design for PSiP/PSoC
    by Lin, Wei-Chih, 林威志
    Published 2017
    “... will use this PSN structure to implement FPIC which can be applied in PSiP (Programmable System in a...”
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  14. 154
    VLSI Implementation of an Asynchronous Interface Design and a Programmable Transceiver
    by Ming-Chun Tuan, 段閔鈞
    Published 2014
    “... calibration algorithm (storage the analog parameter), phase-locked loop frequency calibration system (receive...”
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  15. 155
    Study on VLSI High Gain Driver Amplifiers Design and Applications
    by Yu-Hsuan Lai, 賴育瑄
    Published 2004
    “... to ultrasonic driving system for drug delivery in IC technology. The system includes a relaxation oscillator, a...”
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  16. 156
    VLSI Design of A Polygonal Field Programmable Interconnect Chip
    by Chan Wu-Pin, 詹戊賓
    Published 1999
    “... (Programmable Multiple Chip Module) system. In order to facilitate a cost effective routing network with dynamic...”
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  17. 157
    VLSI Design Techniques of LDPC Codec for Enhanced Throughput and Efficiency
    by Cheng-Zhou Zhan, 詹承洲
    Published 2007
    “...碩士 === 臺灣大學 === 電子工程學研究所 === 95 === In modern communication systems, the low-density parity-check...”
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  18. 158
    Transceiver VLSI Design for High Speed Local Access Modems
    by Shiue, Muh-Tian, 薛木添
    Published 1998
    “...博士 === 國立中央大學 === 電機工程學系 === 86 === In this thesis a low-IF/baseband transceiver VLSI architecture...”
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  19. 159
    Design of Bit Depth Search ECG Compression VLSI Architecture
    by Shih Fan Yu, 游適帆
    Published 2005
    “... for integrating several physiological signals in system on a chip (SoC), the VLSI implementation of ECG...”
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  20. 160
    VLSI Design And Implementation Of An All Digital Duty Cycle Corrector
    by Chang, Wenlung, 張文龍
    Published 2011
    “... used in communication systems, especially for the circuit design of high-speed communication and SOC...”
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