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鄧上軒
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鄧上軒
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鄧上軒
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1
Warpage Simulation of Fan-Out Wafer Level Chip Scale Package
by
Shang-Shiuan Deng
,
鄧
上
軒
Published 2009
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2
Thermal Simulation during Reflow Process and Warpage Simulation after Encapsulation of SiP
by
Shang-ShiuanDeng
,
鄧
上
軒
Published 2016
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