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黃至堯
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黃至堯
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黃至堯
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1
Characterization, simulation, and modeling of minority-carrier well-type guard rings in epitaxial CMOS
by
黃
至
堯
Published 1994
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2
A new computer-aided design of well-type guard ring in CMOS/VLSI
by
HUANG, ZHI-YUO
,
黃
至
堯
Published 1987
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3
ANALYSIS AND IMPROVEMENT OF INSERTED AND BUTTING SUBSTRATE PICKUP LAYOUT STYLE IN ESD NMOS DEVICES
by
Po-Kuan Sung
,
宋柏寬
Published 2008
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黃
至
堯
...
”
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4
DESIGN AND ANALYSIS OF RC-INVERTER-SUBSTRATE AND GATE TRIGGERING NMOS ESD PROTECTION CIRCUIT
by
Chou-Wei Chang
,
張朝偉
Published 2008
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黃
至
堯
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5
ESD NMOS Devices and Circuits of Substrate Gate Triggering and Substrate pickup Adjustment
by
Bo-Chen Lin
,
林柏辰
Published 2011
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黃
至
堯
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6
SCR-Incorporated BJT Circuits with an NMOS Switch for Robust ESD Protection in CMOS Technology
by
Ji-Fan Chi
,
祁季凡
Published 2011
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黃
至
堯
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7
SCR-Buried BJT Devices and Circuits for Robust ESD Protection with High Latchup Immunity
by
Quo-Ker Chen
,
陳國科
Published 2009
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