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Hsiang Yun Wei
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Hsiang Yun Wei
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Hsiang Yun Wei
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1
Hybrid OpenMP/MPI Monte Carlo Simulations in PET
by
Hsiang
Yun
Wei
,
魏湘芸
Published 2004
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2
A Low Jitter Delay-Locked-Loop Applied on DDR4 DRAM
by
Hsiang
-
Yun
Wei
,
魏湘云
Published 2011
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