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Juan Antonio Maestro
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Juan Antonio Maestro
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Juan Antonio Maestro
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1
Protecting Image Processing Pipelines against Configuration Memory Errors in SRAM-Based FPGAs
by
Luis Alberto Aranda
,
Pedro Reviriego
,
Juan
Antonio
Maestro
Published 2018-11-01
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Article
2
A Methodology to Analyze the Fault Tolerance of Demosaicking Methods against Memory Single Event Functional Interrupts (SEFIs)
by
Luis Alberto Aranda
,
Alfonso Sánchez-Macián
,
Juan
Antonio
Maestro
Published 2020-10-01
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Article
3
ACME: A Tool to Improve Configuration Memory Fault Injection in SRAM-Based FPGAs
by
Luis Alberto Aranda
,
Alfonso Sanchez-Macian
,
Juan
Antonio
Maestro
Published 2019-01-01
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Article
4
Radiation Hardened Digital Direct Synthesizer With CORDIC for Spaceborne Applications
by
Luis Alberto Aranda
,
Francisco Garcia-Herrero
,
Luis Esteban
,
Alfonso Sanchez-Macian
,
Juan
Antonio
Maestro
Published 2020-01-01
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Article
5
Reliability Analysis of the SHyLoC CCSDS123 IP Core for Lossless Hyperspectral Image Compression Using COTS FPGAs
by
Luis Alberto Aranda
,
Antonio Sánchez
,
Francisco Garcia-Herrero
,
Yubal Barrios
,
Roberto Sarmiento
,
Juan
Antonio
Maestro
Published 2020-10-01
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Article
6
Fault Injection Emulation for Systems in FPGAs: Tools, Techniques and Methodology, a Tutorial
by
Óscar Ruano
,
Francisco García-Herrero
,
Luis Alberto Aranda
,
Alfonso Sánchez-Macián
,
Laura Rodriguez
,
Juan
Antonio
Maestro
Published 2021-02-01
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Article
7
Analysis of the Critical Bits of a RISC-V Processor Implemented in an SRAM-Based FPGA for Space Applications
by
Luis Alberto Aranda
,
Nils-Johan Wessman
,
Lucana Santos
,
Alfonso Sánchez-Macián
,
Jan Andersson
,
Roland Weigand
,
Juan
Antonio
Maestro
Published 2020-01-01
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Article
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