Showing 1 - 20 results of 45 for search 'Li, Yih Lang', query time: 0.18s Refine Results
  1. 1
    Parallel and Distributed Logic and Fault Simulation
    by Li, Yih Lang, 李毅郎
    Published 1996
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  2. 2
    Detailed Routing Techniques for Block and Cell Designs with Advanced Technology Nodes
    by Fong, Ming-Jie, 鳳明傑
    Published 2019
    Other Authors: “...Li, Yih-Lang...”
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  3. 3
    A Gridless Initial Detailed Router for Advanced VLSI Technologies
    by Hong, Min-Feng, 洪敏峰
    Published 2019
    Other Authors: “...Li, Yih-Lang...”
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  4. 4
    A Study on Minimum Steiner Tree Algorithms and the Application of Routing Algorithms to Near-Future Traffic Evaluation Based Automatic Navigation
    by Lin, Kuen-Wey, 林昆蔚
    Published 2018
    Other Authors: “...Li, Yih-Lang...”
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  5. 5
    Early Warning on Timing Critical Paths
    by Yang, Chih-Yu, 楊芷瑀
    Published 2019
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  6. 6
    Machine learning based Delay-Aware Transistor Placement for Standard Cell Synthesis
    by Yang, Cheng-Yen, 楊承諺
    Published 2019
    Other Authors: “...Li , Yih-Lang...”
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  7. 7
    Multi-layer Obstacle Avoiding Rectilinear Steiner Tree Construction with Reinforcement Learning
    by Sun, Jo-Fu, 孫若芙
    Published 2019
    Other Authors: “...Li, Yih-Lang...”
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  8. 8
    A Novel Fast and Accurate Process Hotspot Detection Method with Prüfer-Code Layout Encoding
    by Su, Hong-Yan, 蘇宏彥
    Published 2013
    Other Authors: “...Li, Yih-Lang...”
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  9. 9
    Standard Cell Routing Algorithm with Fin-FET Structure Considering Complex Design Rules
    by Tseng, Shih-Chiang, 曾是強
    Published 2018
    Other Authors: “...Li, Yih-Lang...”
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  10. 10
    On Optimizing Post-Routing for FinFET Structure Standard Cell Layouts
    by Su, Yang-Hong, 蘇揚鴻
    Published 2018
    Other Authors: “...Li, Yih-Lang...”
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  11. 11
    Standard Cell Layout Optimization Considering Complex Design Rules for Advanced Technology Nodes
    by Chen, Ching-Ho, 陳敬禾
    Published 2017
    Other Authors: “...Li, Yih-Lang...”
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  12. 12
    A High-Quality Maze Routing Algorithm with Adjustable Gridlines for Standard Cell Synthesis
    by Wong, Le, 翁立
    Published 2017
    Other Authors: “...Li, Yih-Lang...”
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  13. 13
    Timing-driven detailed routing
    by Chung, Man-Yun, 鐘曼芸
    Published 2018
    Other Authors: “...Li Yih-Lang...”
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  14. 14
    Near-Future Traffic Evaluation based Navigation for Automated Driving Vehicles with Uncertain Situations
    by Huang, Kuan-Lin, 黃冠淋
    Published 2018
    Other Authors: “...Li, Yih-Lang...”
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  15. 15
    A Robust Standard Cell Layout Synthesis and Verification Framework for Advanced Technology Nodes
    by Su, Hong-Yan, 蘇宏彥
    Published 2018
    Other Authors: “...Li, Yih-Lang...”
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  16. 16
    Early Slack and Late Slack Optimization for Incremental Timing Driven Placement
    by Weng, Shih-Yao, 翁士堯
    Published 2017
    Other Authors: “...Li, Yih-Lang...”
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  17. 17
    Detailed Routing Considering Dynamic End-End Spacing Rules for Advanced Technology Nodes
    by Wei, Ying-Chi, 魏映綺
    Published 2017
    Other Authors: “...Li, Yih-Lang...”
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  18. 18
    Color Balancing Aware Double Patterning
    by Lin, Meng-Yi, 林孟毅
    Published 2016
    Other Authors: “...Li, Yih-Lang...”
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  19. 19
    Girdless Track Routing and Layer Assignment for Critical Area Reduction
    by Lee, Yu-Wei, 李育維
    Published 2009
    Other Authors: “...Li, Yih-Lang...”
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  20. 20
    KDL: Clustering-Based Structure ASIC Placer Considering Clock-Domain Constraint
    by Kao, Chih-Cheng, 高志承
    Published 2009
    Other Authors: “...Li, Yih-Lang...”
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