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Nicolici, N
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Nicolici, N
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Nicolici, N
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1
Power minimisation techniques for testing low power VLSI circuits
by
Nicolici
,
N
.
Published 2000
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2
Correction to the proof of theorem 2 in "Parallel signature analysis design with bounds on aliasing"
by
Nicolici
,
N
.
,
Al-hashimi, B.M
Published 1998
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3
Addressing Useless Test Data in Core-Based System-on-a-Chip Test
by
Gonciari, PT
,
Al-Hashimi, B
,
Nicolici
,
N
Published 2003
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4
Minimising power dissipation during test application in full scan sequential circuits by primary input freezing
by
Nicolici
,
N
.
,
Al-Hashimi, B.M
,
Williams, A.C
Published 2000
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5
BIST hardware synthesis for RTL data paths based on test compatibility classes
by
Nicolici
,
N
.
,
Al-Hashimi, B.M
,
Brown, A.D
,
Williams, A.C
Published 2000
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