Neural Schematics as a unified formal graphical representation of large-scale Neural Network Structures

by Matthias eEhrlich, René eSchüffny
Published 2013-10-01

Network-driven design principles for neuromorphic systems

by Johannes ePartzsch, Rene eSchüffny
Published 2015-10-01

Configurable Analog-Digital Conversion Using the Neural EngineeringFramework

by Christian G Mayr, Johannes ePartzsch, Marko eNoack, Rene eSchüffny
Published 2014-07-01

Reducing the computational footprint for real-time BCPNN learning

by Bernhard eVogginger, René eSchüffny, Anders eLansner, Anders eLansner, Love eCederström, Johannes ePartzsch, Sebastian eHöppner
Published 2015-01-01

Switched-Capacitor Realization of Presynaptic Short-Term Plasticity and Stop-Learning Synapses in 28 nm CMOS

by Marko eNoack, Johannes ePartzsch, Christian G Mayr, Stephan eHänzsche, Stefan eScholze, Sebastian eHöppner, Georg eEllguth, Rene eSchüffny
Published 2015-02-01

VLSI implementation of a 2.8 Gevent/s packet based AER interface with routing and event sorting functionality

by Stefan eScholze, Stefan eSchiefer, Johannes ePartzsch, Stephan eHartmann, Christian Georg Mayr, Sebastian eHöppner, Holger eEisenreich, Stephan eHenker, Bernhard eVogginger, Rene eSchüffny
Published 2011-10-01