A Quadrature PLL With Phase Mismatch Calibration for 32GS/s Time-Interleaved ADC

by Shunli Ma, Tianxiang Wu, Junyan Ren
Published 2020-01-01

A 0.2-Terahertz Ceramic Relic Detection System Based on Iterative Threshold Filtering Imaging and Neural Network

by Yiqing Mao, Tianxiang Wu, Yong Chen, Shunli Ma
Published 2021-09-01

A Sub-6G SP32T Single-Chip Switch with Nanosecond Switching Speed for 5G Applications in 0.25 μm GaAs Technology

by Tianxiang Wu, Jipeng Wei, Hongquan Liu, Shunli Ma, Yong Chen, Junyan Ren
Published 2021-06-01

A 120–150 GHz Power Amplifier in 28-nm CMOS Achieving 21.9-dB Gain and 11.8-dBm P_sat for Sub-THz Imaging System

by Jincheng Zhang, Tianxiang Wu, Lihe Nie, Shunli Ma, Yong Chen, Junyan Ren
Published 2021-01-01

A 6.94-fJ/Conversion-Step 12-bit 100-MS/s Asynchronous SAR ADC Exploiting Split-CDAC in 65-nm CMOS

by Manxin Li, Yuting Yao, Biao Hu, Jipeng Wei, Yong Chen, Shunli Ma, Fan Ye, Junyan Ren
Published 2021-01-01

Analysis and Design of a 35-GHz Hybrid π-Network High-Gain Phase Shifter With 360° Continuous Phase Shifting

by Dong Wei, Xuan Ding, Hai Yu, Yen-Cheng Kuan, Qun Jane Gu, Zhiwei Xu, Shunli Ma, Junyan Ren
Published 2021-01-01

Two-dimensional ferroelectric channel transistors integrating ultra-fast memory and neural computing

by Shuiyuan Wang, Lan Liu, Lurong Gan, Huawei Chen, Xiang Hou, Yi Ding, Shunli Ma, David Wei Zhang, Peng Zhou
Published 2021-01-01

Analog Integrated Circuits Based on Wafer-Level Two-Dimensional MoS₂ Materials With Physical and SPICE Model

by Shunli Ma, Yan Wang, Xinyu Chen, Tianxiang Wu, Xi Wang, Hongwei Tang, Yuting Yao, Hao Yu, Yaochen Sheng, Jingyi Ma, Junyan Ren, Wenzhong Bao
Published 2020-01-01

An in-memory computing architecture based on two-dimensional semiconductors for multiply-accumulate operations

by Yin Wang, Hongwei Tang, Yufeng Xie, Xinyu Chen, Shunli Ma, Zhengzong Sun, Qingqing Sun, Lin Chen, Hao Zhu, Jing Wan, Zihan Xu, David Wei Zhang, Peng Zhou, Wenzhong Bao
Published 2021-06-01