Robust and Latch-Up-Immune LVTSCR Device with an Embedded PMOSFET for ESD Protection in a 28-nm CMOS Process

Robust and Latch-Up-Immune LVTSCR Device with an Embedded PMOSFET for ESD Protection in a 28-nm CMOS Process

Abstract Low-voltage-triggered silicon-controlled rectifier (LVTSCR) is expected to provide an electrostatic discharge (ESD) protection for a low-voltage integrated circuit. However, it is normally vulnerable to the latch-up effect due to its extremely low holding voltage. In this paper, a novel LVT...

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Bibliographic Details
Main Authors: Ruibo Chen, Hongxia Liu, Wenqiang Song, Feibo Du, Hao Zhang, Jikai Zhang, Zhiwei Liu
Format: Article
Language:English
Published: SpringerOpen 2020-11-01
Series:Nanoscale Research Letters
Subjects:
ESD protection
Low-voltage-triggered SCR (LVTSCR)
High holding voltage
Failure current
Turn-on resistance
Online Access:http://link.springer.com/article/10.1186/s11671-020-03437-3

Internet

http://link.springer.com/article/10.1186/s11671-020-03437-3

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