On the verification of strictly deterministic behavior of Timed Finite State Machines
Finite State Machines (FSMs) are widely used as formal models for solving numerous tasks in software engineering, VLSI design, development of telecommunication systems, etc. To describe the behavior of a real-time system one could supply FSM model with clocks - a continuous time parameters with real...
| Main Authors: | , |
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| Format: | Article |
| Language: | English |
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Ivannikov Institute for System Programming of the Russian Academy of Sciences
2018-10-01
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| Series: | Труды Института системного программирования РАН |
| Subjects: | |
| Online Access: | https://ispranproceedings.elpub.ru/jour/article/view/538 |