Physical IC debug ─ backside approach and nanoscale challenge
Physical analysis for IC functionality in submicron technologies requires access through chip backside. Based upon typical global backside preparation with 50–100 µm moderate silicon thickness remaining, a state of the art of the analysis techniques available for this purpose is...
| Main Authors: | , , , , , , , , |
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| Format: | Article |
| Language: | deu |
| Published: |
Copernicus Publications
2008-05-01
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| Series: | Advances in Radio Science |
| Online Access: | http://www.adv-radio-sci.net/6/265/2008/ars-6-265-2008.pdf |