Reduced-Area Constant-Coefficient and Multiple-Constant Multipliers for Xilinx FPGAs with 6-Input LUTs

Reduced-Area Constant-Coefficient and Multiple-Constant Multipliers for Xilinx FPGAs with 6-Input LUTs

Multiplication by a constant is a common operation for many signal, image, and video processing applications that are implemented in field-programmable gate arrays (FPGAs). Constant-coefficient multipliers (KCMs) are often implemented in the logic fabric using lookup tables (LUTs), reserving embedde...

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Bibliographic Details
Main Author: E. George Walters
Format: Article
Language:English
Published: MDPI AG 2017-11-01
Series:Electronics
Subjects:
field-programmable gate array (FPGA)
LUT-based multipliers
constant-coefficient multipliers
multiple-constant multipliers
parallel multipliers
array multipliers
runtime partial reconfiguration
Online Access:https://www.mdpi.com/2079-9292/6/4/101

Internet

https://www.mdpi.com/2079-9292/6/4/101

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