PSP: Parallel sub-pipelined architecture for high throughput AES on FPGA and ASIC
| Main Authors: | , , , , |
|---|---|
| Format: | Article |
| Language: | English |
| Published: |
De Gruyter
2013-12-01
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| Series: | Open Computer Science |
| Subjects: | |
| Online Access: | https://doi.org/10.2478/s13537-013-0112-2 |