Ultracompact and Low-Power Logic Circuits via Workfunction Engineering
An extensive analysis of sub-10-nm logic building blocks utilizing ultracompact logic gates based on recently proposed gate workfunction engineering (WFE) approach is provided. WFE sets the WF in the contacts as well as two independent gates of an ambipolar Schottky-barrier (SB) FinFET to alter the...
Main Authors: | , , , |
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Format: | Article |
Language: | English |
Published: |
IEEE
2019-01-01
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Series: | IEEE Journal on Exploratory Solid-State Computational Devices and Circuits |
Subjects: | |
Online Access: | https://ieeexplore.ieee.org/document/8943278/ |