Implementation of high-speed–low-power adaptive finite impulse response filter with novel architecture

Implementation of high-speed–low-power adaptive finite impulse response filter with novel architecture

An energy efficient high-speed adaptive finite impulse response filter with novel architecture is developed. Synthesis results along with novel architecture on different complementary metal–oxide semiconductor (CMOS) families are presented. Analysis is performed using Artix-7, Spartan-6 and Virtex-4...

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Bibliographic Details
Main Authors: Manish Jaiswal, Sandeep Sharma, Anuj Sharma
Format: Article
Language:English
Published: Wiley 2015-03-01
Series:The Journal of Engineering
Subjects:
FIR filters
CMOS digital integrated circuits
adaptive filters
integrated circuit design
low-power electronics
high-speed-low-power adaptive finite impulse response filter
energy efficient high-speed adaptive finite impulse response filter
complementary metal-oxide semiconductor
CMOS family
Artix-7
Spartan-6
Vertex-4
adaptive least mean square filter
Matlab
Xilinx
critical path delay
size 28 nm
Online Access:http://digital-library.theiet.org/content/journals/10.1049/joe.2014.0198

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http://digital-library.theiet.org/content/journals/10.1049/joe.2014.0198

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