Protector: A Permanent Fault Resilient Router Architecture for Network on Chip
The decreasing size of the transistor has increased the vulnerability towards faults. Increasing number of cores on a single chip has made the concept of Network on Chip (NoC) a standard communication backbone among cores. This facility comes with vulnerability of faults in the system due to decreas...
| Main Authors: | , , |
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| Format: | Article |
| Language: | English |
| Published: |
Mehran University of Engineering and Technology
2020-10-01
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| Series: | Mehran University Research Journal of Engineering and Technology |
| Online Access: | https://publications.muet.edu.pk/index.php/muetrj/article/view/1812 |