Interconnect-Induced Effects on High-Speed Submicron ADC and Clocking Scheme
This paper addresses the impact of interconnects imperfections on SNR, INL and DNL of a typical ADC. It is shown that the interconnect-induced jitter reduces SNR up to 25 dB for global interconnects. Considering only the resistance of interconnects, DNL exhibits 3 times dependency more than that of...
| Main Authors: | , |
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| Format: | Article |
| Language: | English |
| Published: |
IFSA Publishing, S.L.
2007-06-01
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| Series: | Sensors & Transducers |
| Subjects: | |
| Online Access: | http://www.sensorsportal.com/HTML/DIGEST/june_07/P_154.pdf |