Parallel wideband digital up-conversion architecture with efficiency

Parallel wideband digital up-conversion architecture with efficiency

Owing to the limited processing speed of current digital signal processing devices, digital generated signal frequency and bandwidth based on digital up-conversion technique has long been a bottleneck. Interpolation on the baseband signal puts great pressure on the following filtering and mixing ope...

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Bibliographic Details
Main Authors:	Tao Liu, Shulin Tian, Lianping Guo
Format:	Article
Language:	English
Published:	Wiley 2019-10-01
Series:	The Journal of Engineering
Subjects:	interpolation digital signal processing chips low-pass filters up-conversion architecture current digital signal processing devices signal frequency up-conversion technique baseband signal efficient parallel architecture poly-phase low-pass filter anticipated orthogonal mixing signal prototype filter parallel nco decomposition principle poly-phase filter arrays post-interpolation architecture signal up-conversion architecture validity frequency 400.0 mhz
Online Access:	https://digital-library.theiet.org/content/journals/10.1049/joe.2018.9061

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