A SUITABLE CONTROL SCHEME FOR THE BINARY MULTIPLIER DATA BANK OF VLSI CAD
Problem of elaborating a databank of testable digital elements, units and modules, which are most typical for digital systems, is considered. For this bank an original testable logical circuit of matrix binary multiplier, demanding small amount of hardware for its realization, is proposed.
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| Format: | Article |
| Language: | English |
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Dnipro National University of Railway Transport named after Academician V. Lazaryan
2009-09-01
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| Series: | Nauka ta progres transportu |
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| Online Access: | http://stp.diit.edu.ua/article/view/13620/11451 |