A Nonvolatile Fast-Read Two-Transistor SRAM Based on Spintronic Devices

A Nonvolatile Fast-Read Two-Transistor SRAM Based on Spintronic Devices

This paper proposes a compact nonvolatile three-terminal two-transistor spintronic memory cell with a fast-read operation. It is applicable to a variety of current-driven and voltage-controlled write mechanisms, such as spin diffusion, spin Hall effect, domain wall motion, and magnetoelectric effect...

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Bibliographic Details
Main Authors: Chenyun Pan, Azad Naeemi
Format: Article
Language:English
Published: IEEE 2017-01-01
Series:IEEE Journal on Exploratory Solid-State Computational Devices and Circuits
Subjects:
Nonvolatile memory
performance modeling
spintronics
Online Access:https://ieeexplore.ieee.org/document/8115219/
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spelling doaj-36a69445cd92421f8c03557349dfc7e72021-03-29T18:53:50ZengIEEEIEEE Journal on Exploratory Solid-State Computational Devices and Circuits2329-92312017-01-0139310010.1109/JXCDC.2017.27755188115219A Nonvolatile Fast-Read Two-Transistor SRAM Based on Spintronic DevicesChenyun Pan0https://orcid.org/0000-0001-9161-1728Azad Naeemi1School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA, USASchool of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA, USAThis paper proposes a compact nonvolatile three-terminal two-transistor spintronic memory cell with a fast-read operation. It is applicable to a variety of current-driven and voltage-controlled write mechanisms, such as spin diffusion, spin Hall effect, domain wall motion, and magnetoelectric effect. Compared to the prior three-terminal spintronic memory proposal, the new cell provides 20% improvement in cell density. Compared to the conventional spin torque transfer random access memory, the proposed cell separates the read and write paths, and improves the read energy-delay product by up to 22× considering process variations for transistors and MTJs.https://ieeexplore.ieee.org/document/8115219/Nonvolatile memoryperformance modelingspintronics
collection DOAJ
language English
format Article
sources DOAJ
author Chenyun Pan
Azad Naeemi
spellingShingle Chenyun Pan
Azad Naeemi
A Nonvolatile Fast-Read Two-Transistor SRAM Based on Spintronic Devices
IEEE Journal on Exploratory Solid-State Computational Devices and Circuits
Nonvolatile memory
performance modeling
spintronics
author_facet Chenyun Pan
Azad Naeemi
author_sort Chenyun Pan
title A Nonvolatile Fast-Read Two-Transistor SRAM Based on Spintronic Devices
title_short A Nonvolatile Fast-Read Two-Transistor SRAM Based on Spintronic Devices
title_full A Nonvolatile Fast-Read Two-Transistor SRAM Based on Spintronic Devices
title_fullStr A Nonvolatile Fast-Read Two-Transistor SRAM Based on Spintronic Devices
title_full_unstemmed A Nonvolatile Fast-Read Two-Transistor SRAM Based on Spintronic Devices
title_sort nonvolatile fast-read two-transistor sram based on spintronic devices
publisher IEEE
series IEEE Journal on Exploratory Solid-State Computational Devices and Circuits
issn 2329-9231
publishDate 2017-01-01
description This paper proposes a compact nonvolatile three-terminal two-transistor spintronic memory cell with a fast-read operation. It is applicable to a variety of current-driven and voltage-controlled write mechanisms, such as spin diffusion, spin Hall effect, domain wall motion, and magnetoelectric effect. Compared to the prior three-terminal spintronic memory proposal, the new cell provides 20% improvement in cell density. Compared to the conventional spin torque transfer random access memory, the proposed cell separates the read and write paths, and improves the read energy-delay product by up to 22× considering process variations for transistors and MTJs.
topic Nonvolatile memory
performance modeling
spintronics
url https://ieeexplore.ieee.org/document/8115219/
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AT chenyunpan nonvolatilefastreadtwotransistorsrambasedonspintronicdevices
AT azadnaeemi nonvolatilefastreadtwotransistorsrambasedonspintronicdevices
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