Design and Test of the In-Array Build-In Self-Test Scheme for the Embedded RRAM Array

Design and Test of the In-Array Build-In Self-Test Scheme for the Embedded RRAM Array

An in-array build-in self-test (BIST) scheme is proposed for the embedded resistive random access memory (RRAM) array. The BIST circuit consists of the linear-feedback-shift-register (LFSR)- based pattern generator and the multi-input signature register (MISR)-based response compactor, and both the...

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Bibliographic Details
Main Authors: Xiaole Cui, Miaomiao Zhang, Qiujun Lin, Xiaoxin Cui, Anqi Pang
Format: Article
Language:English
Published: IEEE 2019-01-01
Series:IEEE Journal of the Electron Devices Society
Subjects:
RRAM test
LFSR
MISR
in-array BIST
Online Access:https://ieeexplore.ieee.org/document/8781912/

Internet

https://ieeexplore.ieee.org/document/8781912/

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