Benchmarking and Optimization of Spintronic Memory Arrays
In this article, we present a cross-layer optimization and benchmarking of various spintronic memory devices, including spin-transfer-torque magnetic random access memory (STT-MRAM), spin-orbit-torque (SOT) MRAM, voltage-controlled exchange coupling (VCEC) MRAM, and magnetoelectric (ME) MRAM. Variou...
| Main Authors: | , , |
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| Format: | Article |
| Language: | English |
| Published: |
IEEE
2020-01-01
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| Series: | IEEE Journal on Exploratory Solid-State Computational Devices and Circuits |
| Subjects: | |
| Online Access: | https://ieeexplore.ieee.org/document/9104969/ |