A New Low Turn-Off Loss SOI Lateral Insulated Gate Bipolar Transistor With Buried Variation of Lateral Doping Layer

In this paper, we propose a new low turn-off loss silicon-on-insulator (SOI) lateral insulated gate bipolar transistor (LIGBT) with buried variation of lateral doping (VLD) layer. The proposed device features a VLD layer inserted in the drift region, which increases the doping dose (Q) and gradient...

Full description

Bibliographic Details
Main Authors: Tao Tian, Sheng-Li Zhang, Yu-Feng Guo, Jun Zhang, David Z. Pan, Ke-Meng Yang
Format: Article
Language:English
Published: IEEE 2019-01-01
Series:IEEE Journal of the Electron Devices Society
Subjects:
Online Access:https://ieeexplore.ieee.org/document/8506354/
id doaj-42a379e7ba5e45bfbfcf7742447f34c9
record_format Article
spelling doaj-42a379e7ba5e45bfbfcf7742447f34c92021-03-29T18:48:16ZengIEEEIEEE Journal of the Electron Devices Society2168-67342019-01-017626910.1109/JEDS.2018.28777658506354A New Low Turn-Off Loss SOI Lateral Insulated Gate Bipolar Transistor With Buried Variation of Lateral Doping LayerTao Tian0https://orcid.org/0000-0001-5297-3064Sheng-Li Zhang1https://orcid.org/0000-0002-5688-295XYu-Feng Guo2https://orcid.org/0000-0002-1490-986XJun Zhang3https://orcid.org/0000-0002-5688-295XDavid Z. Pan4https://orcid.org/0000-0002-5705-2501Ke-Meng Yang5https://orcid.org/0000-0003-2970-993XCollege of Electronic and Optical Engineering, Nanjing University of Posts and Telecommunications, Nanjing, ChinaCollege of Electronic and Optical Engineering, Nanjing University of Posts and Telecommunications, Nanjing, ChinaCollege of Electronic and Optical Engineering, Nanjing University of Posts and Telecommunications, Nanjing, ChinaCollege of Electronic and Optical Engineering, Nanjing University of Posts and Telecommunications, Nanjing, ChinaCollege of Electronic and Optical Engineering, Nanjing University of Posts and Telecommunications, Nanjing, ChinaCollege of Electronic and Optical Engineering, Nanjing University of Posts and Telecommunications, Nanjing, ChinaIn this paper, we propose a new low turn-off loss silicon-on-insulator (SOI) lateral insulated gate bipolar transistor (LIGBT) with buried variation of lateral doping (VLD) layer. The proposed device features a VLD layer inserted in the drift region, which increases the doping dose (Q) and gradient (G) compared with Uniform P-buried (UPB) SOI LIGBT. The larger capacitance effect induced by lager Q and faster depletion leads to the lower rising anode voltage and reduced storage charge in the drift region. Therefore, a considerable low turn-off loss (Eoff) can be obtained. It is worth to note that owing to reshaped electric field in the new structure, the excess carriers of the drift region could be removed more quickly. Furthermore, larger G of the VLD layer improves the tradeoff between breakdown voltage and turn-off loss. The results of 2-D simulation indicate that the Eoff of the proposed device can reduce by 29.4% and 69.7% at 100 A&#x00B7;cm<sup>-2</sup> and 200 A&#x00B7;cm<sup>-2</sup>, respectively, when compared with UPB SOI LIGBT.https://ieeexplore.ieee.org/document/8506354/Variation of lateral doping (VLD)lateral insulated gate bipolar transistor (LIGBT)linear dopingturn-off losssilicon-on-insulator (SOI)
collection DOAJ
language English
format Article
sources DOAJ
author Tao Tian
Sheng-Li Zhang
Yu-Feng Guo
Jun Zhang
David Z. Pan
Ke-Meng Yang
spellingShingle Tao Tian
Sheng-Li Zhang
Yu-Feng Guo
Jun Zhang
David Z. Pan
Ke-Meng Yang
A New Low Turn-Off Loss SOI Lateral Insulated Gate Bipolar Transistor With Buried Variation of Lateral Doping Layer
IEEE Journal of the Electron Devices Society
Variation of lateral doping (VLD)
lateral insulated gate bipolar transistor (LIGBT)
linear doping
turn-off loss
silicon-on-insulator (SOI)
author_facet Tao Tian
Sheng-Li Zhang
Yu-Feng Guo
Jun Zhang
David Z. Pan
Ke-Meng Yang
author_sort Tao Tian
title A New Low Turn-Off Loss SOI Lateral Insulated Gate Bipolar Transistor With Buried Variation of Lateral Doping Layer
title_short A New Low Turn-Off Loss SOI Lateral Insulated Gate Bipolar Transistor With Buried Variation of Lateral Doping Layer
title_full A New Low Turn-Off Loss SOI Lateral Insulated Gate Bipolar Transistor With Buried Variation of Lateral Doping Layer
title_fullStr A New Low Turn-Off Loss SOI Lateral Insulated Gate Bipolar Transistor With Buried Variation of Lateral Doping Layer
title_full_unstemmed A New Low Turn-Off Loss SOI Lateral Insulated Gate Bipolar Transistor With Buried Variation of Lateral Doping Layer
title_sort new low turn-off loss soi lateral insulated gate bipolar transistor with buried variation of lateral doping layer
publisher IEEE
series IEEE Journal of the Electron Devices Society
issn 2168-6734
publishDate 2019-01-01
description In this paper, we propose a new low turn-off loss silicon-on-insulator (SOI) lateral insulated gate bipolar transistor (LIGBT) with buried variation of lateral doping (VLD) layer. The proposed device features a VLD layer inserted in the drift region, which increases the doping dose (Q) and gradient (G) compared with Uniform P-buried (UPB) SOI LIGBT. The larger capacitance effect induced by lager Q and faster depletion leads to the lower rising anode voltage and reduced storage charge in the drift region. Therefore, a considerable low turn-off loss (Eoff) can be obtained. It is worth to note that owing to reshaped electric field in the new structure, the excess carriers of the drift region could be removed more quickly. Furthermore, larger G of the VLD layer improves the tradeoff between breakdown voltage and turn-off loss. The results of 2-D simulation indicate that the Eoff of the proposed device can reduce by 29.4% and 69.7% at 100 A&#x00B7;cm<sup>-2</sup> and 200 A&#x00B7;cm<sup>-2</sup>, respectively, when compared with UPB SOI LIGBT.
topic Variation of lateral doping (VLD)
lateral insulated gate bipolar transistor (LIGBT)
linear doping
turn-off loss
silicon-on-insulator (SOI)
url https://ieeexplore.ieee.org/document/8506354/
work_keys_str_mv AT taotian anewlowturnofflosssoilateralinsulatedgatebipolartransistorwithburiedvariationoflateraldopinglayer
AT shenglizhang anewlowturnofflosssoilateralinsulatedgatebipolartransistorwithburiedvariationoflateraldopinglayer
AT yufengguo anewlowturnofflosssoilateralinsulatedgatebipolartransistorwithburiedvariationoflateraldopinglayer
AT junzhang anewlowturnofflosssoilateralinsulatedgatebipolartransistorwithburiedvariationoflateraldopinglayer
AT davidzpan anewlowturnofflosssoilateralinsulatedgatebipolartransistorwithburiedvariationoflateraldopinglayer
AT kemengyang anewlowturnofflosssoilateralinsulatedgatebipolartransistorwithburiedvariationoflateraldopinglayer
AT taotian newlowturnofflosssoilateralinsulatedgatebipolartransistorwithburiedvariationoflateraldopinglayer
AT shenglizhang newlowturnofflosssoilateralinsulatedgatebipolartransistorwithburiedvariationoflateraldopinglayer
AT yufengguo newlowturnofflosssoilateralinsulatedgatebipolartransistorwithburiedvariationoflateraldopinglayer
AT junzhang newlowturnofflosssoilateralinsulatedgatebipolartransistorwithburiedvariationoflateraldopinglayer
AT davidzpan newlowturnofflosssoilateralinsulatedgatebipolartransistorwithburiedvariationoflateraldopinglayer
AT kemengyang newlowturnofflosssoilateralinsulatedgatebipolartransistorwithburiedvariationoflateraldopinglayer
_version_ 1724196418704375808