PLL design and investigation in CMOS
In the article the architecture of a charge pump phase locked loop is shown. The influence on overall system performance of its functional blocks is discussed. Voltage controlled oscillator phase noise analysis is done and the relationship between a charge pump phase locked loop and voltage control...
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| Format: | Article |
| Language: | English |
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Vilnius Gediminas Technical University
2010-02-01
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| Series: | Mokslas: Lietuvos Ateitis |
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| Online Access: | http://journals.vgtu.lt/index.php/MLA/article/view/10070 |