Effect of Source/Drain Lateral Straggle on Distortion and Intrinsic Performance of Asymmetric Underlap DG-MOSFETs

This paper presents a systematic study of the effect of source/drain (S/D) implant lateral straggle on the RF performance of the symmetric and asymmetric underlap double gate (UDG) MOSFET devices. The length of the underlap regions (L<sub>un</sub>) on each side of the gate is a critical...

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Bibliographic Details
Main Authors: Kalyan Koley, Arka Dutta, Samar K. Saha, Chandan K. Sarkar
Format: Article
Language:English
Published: IEEE 2014-01-01
Series:IEEE Journal of the Electron Devices Society
Online Access:https://ieeexplore.ieee.org/document/6862860/