Hierarchical Yield-Aware Synthesis Methodology Covering Device-, Circuit-, and System-Level for Radiofrequency ICs

Hierarchical Yield-Aware Synthesis Methodology Covering Device-, Circuit-, and System-Level for Radiofrequency ICs

This paper presents an innovative yield-aware synthesis strategy based on a hierarchical bottom-up methodology that uses a multiobjective evolutionary optimization algorithm to design a complete radiofrequency integrated circuit from the passive component level up to the system level. Within it, per...

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Bibliographic Details
Main Authors: Antonio Canelas, Fabio Passos, Nuno Lourenco, Ricardo Martins, Elisenda Roca, Rafael Castro-Lopez, Nuno Horta, Francisco V. Fernandez
Format: Article
Language:English
Published: IEEE 2021-01-01
Series:IEEE Access
Subjects:
Electronic design automation
Monte Carlo analysis
multiobjective optimization
optimization-based design
radiofrequency integrated circuit
Online Access:https://ieeexplore.ieee.org/document/9530507/

Internet

https://ieeexplore.ieee.org/document/9530507/

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