FPGA Hardware Implementation of DOA Estimation Algorithm Employing LU Decomposition

FPGA Hardware Implementation of DOA Estimation Algorithm Employing LU Decomposition

In this paper, authors present their work on field-programmable gate array (FPGA) hardware implementation of proposed direction of arrival estimation algorithms employing LU factorization. Both L and U matrices were considered in computing the angle estimates. Hardware implementation was done on a V...

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Bibliographic Details
Main Authors: Ahmed A. Hussain, Nizar Tayem, Muhammad Omair Butt, Abdel-Hamid Soliman, Abdulrahman Alhamed, Saleh Alshebeili
Format: Article
Language:English
Published: IEEE 2018-01-01
Series:IEEE Access
Subjects:
FPGAs
LU factorization
NI PXI platform
pipelined architecture
Online Access:https://ieeexplore.ieee.org/document/8327576/

Internet

https://ieeexplore.ieee.org/document/8327576/

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