A Verilog-A Based Fractional Frequency Synthesizer Model for Fast and Accurate Noise Assessment

A Verilog-A Based Fractional Frequency Synthesizer Model for Fast and Accurate Noise Assessment

This paper presents a new strategy to simulate fractional frequency synthesizer behavioral models with better performance and reduced simulation time. The models are described in Verilog-A with accurate phase noise predictions and they are based on a time jitter to power spectral density transforma...

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Bibliographic Details
Main Authors: V. R. Gonzalez-Diaz, J. M. Munoz-Pacheco, G. Espinosa-Flores-Verdad, L. A. Sanchez-Gaspariano
Format: Article
Language:English
Published: Spolecnost pro radioelektronicke inzenyrstvi 2016-04-01
Series:Radioengineering
Subjects:
Frequency Synthesizers
Fractional
Modeling
Sigma-Delta
Phase Noise
Verilog-A
Online Access:http://www.radioeng.cz/fulltexts/2016/16_01_0089_0097.pdf

Internet

http://www.radioeng.cz/fulltexts/2016/16_01_0089_0097.pdf

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