Synchronous Counters Implemented in the PLD Devices
The implementability of synchronous counters in the Programmable Logic Devices (PLD) is discussed in this paper. The most commonly used counters are analysed from this point of view. The expressions for their individual bits are given and the number of product terms is derived to allow to estimate t...
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| Format: | Article |
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Spolecnost pro radioelektronicke inzenyrstvi
1999-04-01
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| Series: | Radioengineering |
| Online Access: | http://www.radioeng.cz/fulltexts/1999/99_01_03.pdf |
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doaj-5d4ebdf0cbd04992bc3859239acc52ad2020-11-24T23:55:52ZengSpolecnost pro radioelektronicke inzenyrstviRadioengineering1210-25121999-04-0181Synchronous Counters Implemented in the PLD DevicesJ. KolouchThe implementability of synchronous counters in the Programmable Logic Devices (PLD) is discussed in this paper. The most commonly used counters are analysed from this point of view. The expressions for their individual bits are given and the number of product terms is derived to allow to estimate the size of the particular counter which can be implemented in the chosen PLD.www.radioeng.cz/fulltexts/1999/99_01_03.pdf |
| collection |
DOAJ |
| language |
English |
| format |
Article |
| sources |
DOAJ |
| author |
J. Kolouch |
| spellingShingle |
J. Kolouch Synchronous Counters Implemented in the PLD Devices Radioengineering |
| author_facet |
J. Kolouch |
| author_sort |
J. Kolouch |
| title |
Synchronous Counters Implemented in the PLD Devices |
| title_short |
Synchronous Counters Implemented in the PLD Devices |
| title_full |
Synchronous Counters Implemented in the PLD Devices |
| title_fullStr |
Synchronous Counters Implemented in the PLD Devices |
| title_full_unstemmed |
Synchronous Counters Implemented in the PLD Devices |
| title_sort |
synchronous counters implemented in the pld devices |
| publisher |
Spolecnost pro radioelektronicke inzenyrstvi |
| series |
Radioengineering |
| issn |
1210-2512 |
| publishDate |
1999-04-01 |
| description |
The implementability of synchronous counters in the Programmable Logic Devices (PLD) is discussed in this paper. The most commonly used counters are analysed from this point of view. The expressions for their individual bits are given and the number of product terms is derived to allow to estimate the size of the particular counter which can be implemented in the chosen PLD. |
| url |
http://www.radioeng.cz/fulltexts/1999/99_01_03.pdf |
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